Maeng et al., 2019 - Google Patents
A sub-fs-FoM digital LDO using PMOS and NMOS arrays with fully integrated 7.2-pF total capacitanceMaeng et al., 2019
- Document ID
- 12797999452379691538
- Author
- Maeng J
- Shim M
- Jeong J
- Park I
- Park Y
- Kim C
- Publication year
- Publication venue
- IEEE Journal of Solid-State Circuits
External Links
Snippet
A digital low-dropout (DLDO) regulator using p-type MOS (PMOS) and n-type MOS (NMOS) switches is proposed to achieve a sub-fs speed figure-of-merit (FoM) by reducing the total capacitance (CTOT) and accomplishing a comparable output voltage droop (ΔVOUT) during …
- 238000000034 method 0 abstract description 9
Classifications
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M3/00—Conversion of dc power input into dc power output
- H02M3/02—Conversion of dc power input into dc power output without intermediate conversion into ac
- H02M3/04—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters
- H02M3/10—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
- H02M3/145—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
- H02M3/155—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
- H02M3/156—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M3/00—Conversion of dc power input into dc power output
- H02M3/02—Conversion of dc power input into dc power output without intermediate conversion into ac
- H02M3/04—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters
- H02M3/06—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using resistors or capacitors, e.g. potential divider
- H02M3/07—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using resistors or capacitors, e.g. potential divider using capacitors charged and discharged alternately by semiconductor devices with control electrode, e.g. charge pumps
-
- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
- G05F3/00—Non-retroactive systems for regulating electric variables by using an uncontrolled element, or an uncontrolled combination of elements, such element or such combination having self-regulating properties
- G05F3/02—Regulating voltage or current
- G05F3/08—Regulating voltage or current wherein the variable is dc
- G05F3/10—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics
- G05F3/16—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices
-
- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
- G05F1/00—Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
- G05F1/10—Regulating voltage or current
- G05F1/46—Regulating voltage or current wherein the variable actually regulated by the final control device is dc
- G05F1/56—Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices
Similar Documents
Publication | Publication Date | Title |
---|---|---|
Yang et al. | A nanosecond-transient fine-grained digital LDO with multi-step switching scheme and asynchronous adaptive pipeline control | |
Liu et al. | A high-frequency three-level buck converter with real-time calibration and wide output range for fast-DVS | |
Nasir et al. | Switched-mode-control based hybrid LDO for fine-grain power management of digital load circuits | |
Yan et al. | Direct 48-/1-V GaN-based DC–DC power converter with double step-down architecture and master–slave AO 2 T control | |
Butzen et al. | Scalable parasitic charge redistribution: Design of high-efficiency fully integrated switched-capacitor DC–DC converters | |
Okuma et al. | 0.5-V input digital LDO with 98.7% current efficiency and 2.7-µA quiescent current in 65nm CMOS | |
Akram et al. | Fast transient fully standard-cell-based all digital low-dropout regulator with 99.97% current efficiency | |
Lai et al. | A fully on-chip area-efficient CMOS low-dropout regulator with fast load regulation | |
Wang et al. | A dynamically high-impedance charge-pump-based LDO with digital-LDO-like properties achieving a sub-4-fs FoM | |
Maeng et al. | A sub-fs-FoM digital LDO using PMOS and NMOS arrays with fully integrated 7.2-pF total capacitance | |
Chen et al. | A fast-transient 500-mA digitally assisted analog LDO with 30-μ V/mA load regulation and 0.0073-ps FoM in 65-nm CMOS | |
Mao et al. | A scalable high-current high-accuracy dual-loop four-phase switching LDO for microprocessors | |
Shin et al. | A 65nm 0.6–1.2 V low-dropout regulator using voltage-difference-to-time converter with direct output feedback | |
Oh et al. | A highly synthesizable 0.5-to-1.0-V digital low-dropout regulator with adaptive clocking and incremental regulation scheme | |
Luo et al. | Design of digital tri-mode adaptive-output buck–boost power converter for power-efficient integrated systems | |
Woo et al. | A 0.35 V 90nA quiescent current output-capacitor-less NMOS low-dropout regulator using a coarse-fine charge-pump circuit | |
Abdelmagid et al. | An adaptive fully integrated dual-output energy harvesting system with MPPT and storage capability | |
Hu et al. | A 500 nA quiescent, 100 mA maximum load CMOS low-dropout regulator | |
Tseng et al. | An integrated linear regulator with fast output voltage transition for dual-supply SRAMs in DVFS systems | |
Camacho et al. | An NMOS low dropout voltage regulator with switched floating capacitor gate overdrive | |
Lin et al. | Leakage current elimination for Dickson charge pump with a linear regulator | |
Hong et al. | High area-efficient DC-DC converter with high reliability using time-mode Miller compensation (TMMC) | |
Ji et al. | A Fully-Digital LDO with Adaptive Clock and Double-Edge-Triggered Shift Register for Quick Response | |
Park et al. | A Fully Integrated Dual-Output Continuously Scalable-Conversion-Ratio SC Converter for Battery-Powered IoT Applications | |
Zhang et al. | A 0.79 pJ/K-gate, 83% efficient unified core and voltage regulator architecture for sub/near-threshold operation in 130 nm CMOS |