Srivastava et al., 2011 - Google Patents
Effect of Gate Finger on Double-Gate MOSFET for RF Switch at 45-nm TechnologySrivastava et al., 2011
View PDF- Document ID
- 12520685319368204574
- Author
- Srivastava V
- Singh G
- Yadav K
- Publication year
- Publication venue
- 2011 International Conference on Communication Systems and Network Technologies
External Links
Snippet
In this paper, an independently controlled symmetrical double-gate MOSFET is analyzed, which is used for the double-pole four-throw RF CMOS switch design. This analysis emphasizes on the study of the effect of number of gate finger and their layouts for the …
- 230000000694 effects 0 title abstract description 13
Classifications
-
- H—ELECTRICITY
- H01—BASIC ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
-
- H—ELECTRICITY
- H01—BASIC ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/778—Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface
-
- H—ELECTRICITY
- H01—BASIC ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body
- H01L27/08—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind
- H01L27/085—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only
- H01L27/088—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate
-
- H—ELECTRICITY
- H03—BASIC ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K17/00—Electronic switching or gating, i.e. not by contact-making or -braking
- H03K17/51—Electronic switching or gating, i.e. not by contact-making or -braking characterised by the components used
- H03K17/56—Electronic switching or gating, i.e. not by contact-making or -braking characterised by the components used using semiconductor devices
- H03K17/687—Electronic switching or gating, i.e. not by contact-making or -braking characterised by the components used using semiconductor devices using field-effect transistors
- H03K17/693—Switching arrangements with several input- or output-terminals
-
- H—ELECTRICITY
- H01—BASIC ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/0203—Particular design considerations for integrated circuits
-
- H—ELECTRICITY
- H03—BASIC ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/0008—Arrangements for reducing power consumption
-
- H—ELECTRICITY
- H03—BASIC ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/0175—Coupling arrangements; Interface arrangements
-
- H—ELECTRICITY
- H01—BASIC ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
-
- H—ELECTRICITY
- H01—BASIC ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
-
- H—ELECTRICITY
- H03—BASIC ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K2217/00—Indexing scheme related to electronic switching or gating, i.e. not by contact-making or -breaking covered by H03K17/00
Similar Documents
Publication | Publication Date | Title |
---|---|---|
Srivastava et al. | MOSFET technologies for double-pole four-throw radio-frequency switch | |
Srivastava et al. | Design and performance analysis of double-gate MOSFET over single-gate MOSFET for RF switch | |
US8030971B2 (en) | High-density logic techniques with reduced-stack multi-gate field effect transistors | |
Ong et al. | A 22nm FDSOI technology optimized for RF/mmWave applications | |
Kim et al. | Double gate-MOSFET subthreshold circuit for ultralow power applications | |
Jacquet et al. | A 3 GHz dual core processor ARM cortex TM-A9 in 28 nm UTBB FD-SOI CMOS with ultra-wide voltage range and energy efficiency optimization | |
Agostinelli et al. | Leakage–delay tradeoff in FinFET logic circuits: A comparative analysis with bulk technology | |
Srivastava et al. | Analysis of double-gate CMOS for double-pole four-throw RF switch design at 45-nm technology | |
Tawfik et al. | FinFET domino logic with independent gate keepers | |
Narendar et al. | Design of high-performance digital logic circuits based on FinFET technology | |
Zhang et al. | Low-power high-performance double-gate fully depleted SOI circuit design | |
US10211825B2 (en) | Circuits having a switch with back-gate bias | |
Zhao et al. | 22FDSOI device towards RF and mmWave applications | |
Ponton et al. | Design of ultra-wideband low-noise amplifiers in 45-nm CMOS technology: Comparison between planar bulk and SOI FinFET devices | |
Srivastava et al. | Effect of Gate Finger on Double-Gate MOSFET for RF Switch at 45-nm Technology | |
WO2015042049A1 (en) | Multi-threshold circuitry based on silicon-on-insulator technology | |
Testa et al. | 110 GHz travelling-wave amplifier in 22 nm FD-SOI CMOS | |
Zhang et al. | Effects and contrasts of silicon‐on‐insulator floating‐body and body‐contacted field‐effect transistors to the design of high‐performance antenna switches | |
Srivastava et al. | Analysis of drain current and switching speed for SPDT switch and DPDT switch with the proposed DP4T RF CMOS switch | |
Srivastava | Performance of double-pole four-throw double-gate RF CMOS switch in 45-nm technology | |
Guo et al. | Effect of the Single-and Dual-k Spacers on a Negative-capacitance Fin Field-effect Transistor | |
Balasubramaniyan et al. | RF/mmWave front-end module switch in 22nm FDSOI process | |
Maity et al. | Performance Assessment of CMOS circuits using III-V on Insulator MOS Transistors | |
Pacha et al. | Efficiency of low-power design techniques in multi-gate FET CMOS circuits | |
Corsonello et al. | Exploring well configurations for voltage level converter design in 28 nm UTBB FDSOI technology |