Leijten-Nowak, 2004 - Google Patents
Template-based embedded reconfigurable computingLeijten-Nowak, 2004
View PDF- Document ID
- 12567960366839784587
- Author
- Leijten-Nowak K
- Publication year
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This Ph. D. thesis completes the research I was conducting in the period February 1999– April 2003 in the Embedded Systems Architectures on Silicon Group at Philips Research Laboratories in Eindhoven, The Netherlands. My research was done as part of the ARCADE …
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N silicon 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AxNzUuMSwxNDUuMSBMIDE3NS4wLDE0NS4yIEwgMTc1LjAsMTQ1LjQgTCAxNzQuOSwxNDUuNiBMIDE3NC45LDE0NS43IEwgMTc0LjksMTQ1LjkgTCAxNzQuOSwxNDYuMSBMIDE3NC45LDE0Ni4zIEwgMTc0LjksMTQ2LjQgTCAxNzUuMCwxNDYuNiBMIDE3NS4wLDE0Ni44IEwgMTc1LjEsMTQ2LjkgTCAxNzUuMiwxNDcuMSBMIDE3NS4zLDE0Ny4yIEwgMTc1LjQsMTQ3LjMgTCAxNzUuNSwxNDcuNSBMIDE3NS43LDE0Ny42IEwgMTc1LjgsMTQ3LjcgTCAxNzUuOSwxNDcuOCBMIDE3Ni4xLDE0Ny44IEwgMTc2LjMsMTQ3LjkgTCAxNzYuNCwxNDcuOSBMIDE3Ni42LDE0OC4wIEwgMTc2LjgsMTQ4LjAgTCAxNzYuOSwxNDguMCBMIDE3Ny4xLDE0OC4wIEwgMTc3LjMsMTQ4LjAgTCAxNzcuNSwxNDcuOSBMIDE3Ny42LDE0Ny45IEwgMTc3LjgsMTQ3LjggTCAxNzcuOSwxNDcuNyBMIDE3OC4xLDE0Ny42IEwgMTc4LjIsMTQ3LjUgTCAxNzguMywxNDcuNCBMIDE3OC40LDE0Ny4zIEwgMTc4LjUsMTQ3LjEgTCAxNzguNiwxNDcuMCBMIDE3OC43LDE0Ni44IEwgMTc4LjgsMTQ2LjcgTCAxNzguOCwxNDYuNSBMIDE3OC45LDE0Ni4zIEwgMTc4LjksMTQ2LjIgTCAxNzguOSwxNDYuMCBMIDE3Ni45LDE0Ni4wIFonIHN0eWxlPSdmaWxsOiMwMDAwMDA7ZmlsbC1ydWxlOmV2ZW5vZGQ7ZmlsbC1vcGFjaXR5OjE7c3Ryb2tlOiMwMDAwMDA7c3Ryb2tlLXdpZHRoOjAuMHB4O3N0cm9rZS1saW5lY2FwOmJ1dHQ7c3Ryb2tlLWxpbmVqb2luOm1pdGVyO3N0cm9rZS1vcGFjaXR5OjE7JyAvPgo8cGF0aCBkPSdNIDE3OC45LDE1NC4wIEwgMTc4LjksMTUzLjggTCAxNzguOSwxNTMuNyBMIDE3OC44LDE1My41IEwgMTc4LjgsMTUzLjMgTCAxNzguNywxNTMuMiBMIDE3OC42LDE1My4wIEwgMTc4LjUsMTUyLjkgTCAxNzguNCwxNTIuNyBMIDE3OC4zLDE1Mi42IEwgMTc4LjIsMTUyLjUgTCAxNzguMSwxNTIuNCBMIDE3Ny45LDE1Mi4zIEwgMTc3LjgsMTUyLjIgTCAxNzcuNiwxNTIuMSBMIDE3Ny41LDE1Mi4xIEwgMTc3LjMsMTUyLjAgTCAxNzcuMSwxNTIuMCBMIDE3Ni45LDE1Mi4wIEwgMTc2LjgsMTUyLjAgTCAxNzYuNiwxNTIuMCBMIDE3Ni40LDE1Mi4xIEwgMTc2LjMsMTUyLjEgTCAxNzYuMSwxNTIuMiBMIDE3NS45LDE1Mi4yIEwgMTc1LjgsMTUyLjMgTCAxNzUuNywxNTIuNCBMIDE3NS41LDE1Mi41IEwgMTc1LjQsMTUyLjcgTCAxNzUuMywxNTIuOCBMIDE3NS4yLDE1Mi45IEwgMTc1LjEsMTUzLjEgTCAxNzUuMCwxNTMuMiBMIDE3NS4wLDE1My40IEwgMTc0LjksMTUzLjYgTCAxNzQuOSwxNTMuNyBMIDE3NC45LDE1My45IEwgMTc0LjksMTU0LjEgTCAxNzQuOSwxNTQuMyBMIDE3NC45LDE1NC40IEwgMTc1LjAsMTU0LjYgTCAxNzUuMCwxNTQuOCBMIDE3NS4xLDE1NC45IEwgMTc1LjIsMTU1LjEgTCAxNzUuMywxNTUuMiBMIDE3NS40LDE1NS4zIEwgMTc1LjUsMTU1LjUgTCAxNzUuNywxNTUuNiBMIDE3NS44LDE1NS43IEwgMTc1LjksMTU1LjggTCAxNzYuMSwxNTUuOCBMIDE3Ni4zLDE1NS45IEwgMTc2LjQsMTU1LjkgTCAxNzYuNiwxNTYuMCBMIDE3Ni44LDE1Ni4wIEwgMTc2LjksMTU2LjAgTCAxNzcuMSwxNTYuMCBMIDE3Ny4zLDE1Ni4wIEwgMTc3LjUsMTU1LjkgTCAxNzcuNiwxNTUuOSBMIDE3Ny44LDE1NS44IEwgMTc3LjksMTU1LjcgTCAxNzguMSwxNTUuNiBMIDE3OC4yLDE1NS41IEwgMTc4LjMsMTU1LjQgTCAxNzguNCwxNTUuMyBMIDE3OC41LDE1NS4xIEwgMTc4LjYsMTU1LjAgTCAxNzguNywxNTQuOCBMIDE3OC44LDE1NC43IEwgMTc4LjgsMTU0LjUgTCAxNzguOSwxNTQuMyBMIDE3OC45LDE1NC4yIEwgMTc4LjksMTU0LjAgTCAxNzYuOSwxNTQuMCBaJyBzdHlsZT0nZmlsbDojMDAwMDAwO2ZpbGwtcnVsZTpldmVub2RkO2ZpbGwtb3BhY2l0eToxO3N0cm9rZTojMDAwMDAwO3N0cm9rZS13aWR0aDowLjBweDtzdHJva2UtbGluZWNhcDpidXR0O3N0cm9rZS1saW5lam9pbjptaXRlcjtzdHJva2Utb3BhY2l0eToxOycgLz4KPC9zdmc+Cg== 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[Si] 0 abstract description 36
Classifications
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- G—PHYSICS
- G06—COMPUTING; CALCULATING; COUNTING
- G06F—ELECTRICAL DIGITAL DATA PROCESSING
- G06F17/00—Digital computing or data processing equipment or methods, specially adapted for specific functions
- G06F17/50—Computer-aided design
- G06F17/5045—Circuit design
- G06F17/5054—Circuit design for user-programmable logic devices, e.g. field programmable gate arrays [FPGA]
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING; COUNTING
- G06F—ELECTRICAL DIGITAL DATA PROCESSING
- G06F17/00—Digital computing or data processing equipment or methods, specially adapted for specific functions
- G06F17/50—Computer-aided design
- G06F17/5045—Circuit design
- G06F17/505—Logic synthesis, e.g. technology mapping, optimisation
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING; COUNTING
- G06F—ELECTRICAL DIGITAL DATA PROCESSING
- G06F17/00—Digital computing or data processing equipment or methods, specially adapted for specific functions
- G06F17/50—Computer-aided design
- G06F17/5009—Computer-aided design using simulation
- G06F17/5022—Logic simulation, e.g. for logic circuit operation
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- G—PHYSICS
- G06—COMPUTING; CALCULATING; COUNTING
- G06F—ELECTRICAL DIGITAL DATA PROCESSING
- G06F15/00—Digital computers in general; Data processing equipment in general
- G06F15/76—Architectures of general purpose stored programme computers
- G06F15/78—Architectures of general purpose stored programme computers comprising a single central processing unit
- G06F15/7867—Architectures of general purpose stored programme computers comprising a single central processing unit with reconfigurable architecture
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- G—PHYSICS
- G06—COMPUTING; CALCULATING; COUNTING
- G06F—ELECTRICAL DIGITAL DATA PROCESSING
- G06F17/00—Digital computing or data processing equipment or methods, specially adapted for specific functions
- G06F17/50—Computer-aided design
- G06F17/5068—Physical circuit design, e.g. layout for integrated circuits or printed circuit boards
- G06F17/5081—Layout analysis, e.g. layout verification, design rule check
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- G—PHYSICS
- G06—COMPUTING; CALCULATING; COUNTING
- G06F—ELECTRICAL DIGITAL DATA PROCESSING
- G06F17/00—Digital computing or data processing equipment or methods, specially adapted for specific functions
- G06F17/50—Computer-aided design
- G06F17/5068—Physical circuit design, e.g. layout for integrated circuits or printed circuit boards
- G06F17/5072—Floorplanning, e.g. partitioning, placement
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- G—PHYSICS
- G06—COMPUTING; CALCULATING; COUNTING
- G06F—ELECTRICAL DIGITAL DATA PROCESSING
- G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
- G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
- G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
- G06F7/52—Multiplying; Dividing
- G06F7/523—Multiplying only
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING; COUNTING
- G06F—ELECTRICAL DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for programme control, e.g. control unit
- G06F9/06—Arrangements for programme control, e.g. control unit using stored programme, i.e. using internal store of processing equipment to receive and retain programme
- G06F9/30—Arrangements for executing machine-instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline, look ahead
- G06F9/3885—Concurrent instruction execution, e.g. pipeline, look ahead using a plurality of independent parallel functional units
- G06F9/3893—Concurrent instruction execution, e.g. pipeline, look ahead using a plurality of independent parallel functional units controlled in tandem, e.g. multiplier-accumulator
- G06F9/3895—Concurrent instruction execution, e.g. pipeline, look ahead using a plurality of independent parallel functional units controlled in tandem, e.g. multiplier-accumulator for complex operations, e.g. multidimensional or interleaved address generators, macros
- G06F9/3897—Concurrent instruction execution, e.g. pipeline, look ahead using a plurality of independent parallel functional units controlled in tandem, e.g. multiplier-accumulator for complex operations, e.g. multidimensional or interleaved address generators, macros with adaptable data path
-
- G—PHYSICS
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- G06F—ELECTRICAL DIGITAL DATA PROCESSING
- G06F2217/00—Indexing scheme relating to computer aided design [CAD]
- G06F2217/78—Power analysis and optimization
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- G—PHYSICS
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- G06F—ELECTRICAL DIGITAL DATA PROCESSING
- G06F2207/00—Indexing scheme relating to methods or arrangements for processing data by operating upon the order or content of the data handled
- G06F2207/38—Indexing scheme relating to groups G06F7/38 - G06F7/575
-
- H—ELECTRICITY
- H03—BASIC ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
- H03K19/173—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
- H03K19/177—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form
- H03K19/17724—Structural details of logic blocks
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING; COUNTING
- G06F—ELECTRICAL DIGITAL DATA PROCESSING
- G06F1/00—Details of data-processing equipment not covered by groups G06F3/00 - G06F13/00, e.g. cooling, packaging or power supply specially adapted for computer application
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING; COUNTING
- G06F—ELECTRICAL DIGITAL DATA PROCESSING
- G06F21/00—Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
-
- H—ELECTRICITY
- H03—BASIC ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
- H03K19/173—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
- H03K19/177—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form
- H03K19/1778—Structural details for adapting physical parameters
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