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Craig et al., 1983 - Google Patents

PIPE: A High Performance VLSI Processor Implementation

Craig et al., 1983

View PDF
Document ID
12450866583242611946
Author
Craig G
Goodman J
Katz R
Pleszkun A
Ramachendran K
Sayah J
Smith J
Publication year

External Links

Snippet

PIPE is a high performance computer architecture with several features that make it well- suited for VLSI implementation. A PIPE” raachine” consists of a memory controller and two co-processors. An access processor (A-unit) computes operand addresses for the execute …
Continue reading at minds.wisconsin.edu (PDF) (other versions)

Classifications

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    • G06F9/3885—Concurrent instruction execution, e.g. pipeline, look ahead using a plurality of independent parallel functional units
    • G06F9/3889—Concurrent instruction execution, e.g. pipeline, look ahead using a plurality of independent parallel functional units controlled by multiple instructions, e.g. MIMD, decoupled access or execute
    • G06F9/3891—Concurrent instruction execution, e.g. pipeline, look ahead using a plurality of independent parallel functional units controlled by multiple instructions, e.g. MIMD, decoupled access or execute organised in groups of units sharing resources, e.g. clusters
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