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Dennis et al., 2017 - Google Patents

Single cycle RISC-V micro architecture processor and its FPGA prototype

Dennis et al., 2017

Document ID
12275552149717233764
Author
Dennis D
Priyam A
Virk S
Agrawal S
Sharma T
Mondal A
Ray K
Publication year
Publication venue
2017 7th International Symposium on Embedded Computing and System Design (ISED)

External Links

Snippet

In this paper, development of a fully synthesizable 32-bit processor based on the open- source RISC-V (RV32I) ISA is presented. This processor is designed for targeting low-cost embedded devices. A RISC-V development and validation framework with assembling tools …
Continue reading at ieeexplore.ieee.org (other versions)

Classifications

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