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Bandali et al., 2014 - Google Patents

Accelerated harmonic-balance analysis using a graphical processing unit platform

Bandali et al., 2014

Document ID
11931153872337351805
Author
Bandali B
Gad E
Bolic M
Publication year
Publication venue
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

External Links

Snippet

This paper describes a new approach to accelerate the simulation of the steady-state response of nonlinear circuits using the harmonic-balance (HB) technique. The approach presented in this paper focuses on the direct factorization of the Jacobian matrix, of the HB …
Continue reading at ieeexplore.ieee.org (other versions)

Classifications

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    • G06F17/5036—Computer-aided design using simulation for analog modelling, e.g. for circuits, spice programme, direct methods, relaxation methods
    • G—PHYSICS
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    • G06F17/141—Discrete Fourier transforms
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    • G—PHYSICS
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    • G—PHYSICS
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    • G—PHYSICS
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    • G06F7/72—Methods or arrangements for performing computations using a digital non-denominational number representation, i.e. number representation without radix; Computing devices using combinations of denominational and non-denominational quantity representations, e.g. using difunction pulse trains, STEELE computers, phase computers using residue arithmetic
    • G06F7/724—Finite field arithmetic
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    • G—PHYSICS
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