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Graziano et al., 2008 - Google Patents

Statistical power supply dynamic noise prediction in hierarchical power grid and package networks

Graziano et al., 2008

View PDF
Document ID
11961688023319369922
Author
Graziano M
Piccinini G
Publication year
Publication venue
Integration

External Links

Snippet

One of the most crucial high performance systems-on-chip design challenge is to front their power supply noise sufferance due to high frequencies, huge number of functional blocks and technology scaling down. Marking a difference from traditional post physical-design …
Continue reading at core.ac.uk (PDF) (other versions)

Classifications

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    • G06F17/5036—Computer-aided design using simulation for analog modelling, e.g. for circuits, spice programme, direct methods, relaxation methods
    • G—PHYSICS
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    • G06F17/5068—Physical circuit design, e.g. layout for integrated circuits or printed circuit boards
    • G06F17/5081—Layout analysis, e.g. layout verification, design rule check
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    • G06Q30/00—Commerce, e.g. shopping or e-commerce

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