Che et al., 2018 - Google Patents
Failure mode and mechanism analysis for Cu wire bond on Cu/Low-k chip by wire pull test and finite-element analysisChe et al., 2018
View PDF- Document ID
- 11824552368202482444
- Author
- Che F
- Wai L
- Chai T
- Publication year
- Publication venue
- IEEE Transactions on Device and Materials Reliability
External Links
Snippet
In this paper, failure mode and mechanism analysis on Cu wire bond and bond pad reliability for Cu/low-k chip are investigated through wire pull test and finite-element analysis (FEA). The wire pull test has been carried out for the bonded Cu wires with changing pull …
- 238000004458 analytical method 0 title abstract description 23
Similar Documents
Publication | Publication Date | Title |
---|---|---|
Che et al. | Failure mode and mechanism analysis for Cu wire bond on Cu/Low-k chip by wire pull test and finite-element analysis | |
Mercado et al. | Impact of flip-chip packaging on copper/low-k structures | |
US8829675B2 (en) | Repairing anomalous stiff pillar bumps | |
Wunderle et al. | Thermo-mechanical reliability of 3D-integrated microstructures in stacked silicon | |
Zhang et al. | Modeling thermal stresses in 3-D IC interwafer interconnects | |
US9021894B2 (en) | Detecting anomalous weak BEOL sites in a metallization system | |
Mazloum-Nejadari et al. | Reliability of Cu wire bonds in microelectronic packages | |
Peterson et al. | Calculation and validation of thermomechanical stresses in flip chip BGA using the ATC4. 2 test vehicle | |
Zhang et al. | Thermal stresses in 3D IC inter-wafer interconnects | |
Yeh et al. | Transient simulation of wire pull test on Cu/low-K wafers | |
Kuechenmeister et al. | Chip-package interaction: Challenges and solutions to mechanical stability of Back end of Line at 28nm node and beyond for advanced flip chip application | |
Viswanath et al. | Numerical study of gold wire bonding process on Cu/low-k structures | |
Ryan et al. | CPI Challenges to BEOL at 28nm Node and Beyond | |
Lu et al. | Reliability and flexibility of ultra-thin chip-on-flex (UTCOF) interconnects with anisotropic conductive adhesive (ACA) joints | |
Che et al. | Characterization and modeling of fine-pitch copper ball bonding on a Cu/low-k chip | |
Raghavan et al. | Shear test on hard coated flip-chip bumps to measure back end of the line stack reliability | |
US8950269B2 (en) | Detecting anomalous stiff pillar bumps formed above a metallization system | |
Yeo et al. | Flip chip solder joint fatigue analysis using 2D and 3D FE models | |
Mazzei et al. | Analysis of Cu-wire pull and shear test failure modes under ageing cycles and finite element modelling of Si-crack propagation | |
Chang et al. | A viscoplastic-based fatigue reliability model for the polyimide dielectric thin film | |
Gonzalez et al. | Methodologies to mitigate package induced stresses in the BEOL | |
Czerny et al. | Interface characterization of CuCu ball bonds by a fast shear fatigue method | |
Spaan et al. | Wire bonding the future: a combined experimental and numerical approach to improve the Cu-wire bonding quality | |
Qian et al. | Wire bonding capillary profile and bonding process parameter optimization simulation | |
Chen et al. | Reliability evaluation of BOAC and normal pad stacked-chip packaging using low-K wafers |