Yasin et al., 2017 - Google Patents
Removal attacks on logic locking and camouflaging techniquesYasin et al., 2017
View PDF- Document ID
- 11487425734797531728
- Author
- Yasin M
- Mazumdar B
- Sinanoglu O
- Rajendran J
- Publication year
- Publication venue
- IEEE Transactions on Emerging Topics in Computing
External Links
Snippet
With the adoption of a globalized and distributed IC design flow, IP piracy, reverse engineering, and counterfeiting threats are becoming more prevalent. Logic obfuscation techniques including logic locking and IC camouflaging have been developed to address …
- 238000000034 method 0 title abstract description 37
Similar Documents
Publication | Publication Date | Title |
---|---|---|
Yasin et al. | Removal attacks on logic locking and camouflaging techniques | |
Chakraborty et al. | Keynote: A disquisition on logic locking | |
Xie et al. | Anti-SAT: Mitigating SAT attack on logic locking | |
Yasin et al. | On improving the security of logic locking | |
Sirone et al. | Functional analysis attacks on logic locking | |
Yang et al. | Stripped functionality logic locking with Hamming distance-based restore unit (SFLL-hd)–unlocked | |
Yasin et al. | CamoPerturb: Secure IC camouflaging for minterm protection | |
Zamiri Azar et al. | Threats on logic locking: A decade later | |
Li et al. | Provably secure camouflaging strategy for IC protection | |
Xie et al. | Mitigating SAT attack on logic locking | |
Yasin et al. | Security analysis of anti-sat | |
Sengupta et al. | Truly stripping functionality for logic locking: A fault-based perspective | |
Yasin et al. | Evolution of logic locking | |
Subramanyan et al. | Evaluating the security of logic encryption algorithms | |
Nahiyan et al. | Security-aware FSM design flow for identifying and mitigating vulnerabilities to fault attacks | |
Karri et al. | Trustworthy hardware: Identifying and classifying hardware trojans | |
Plaza et al. | Solving the third-shift problem in IC piracy with test-aware logic locking | |
Alaql et al. | SCOPE: Synthesis-based constant propagation attack on logic locking | |
Koteshwara et al. | Key-based dynamic functional obfuscation of integrated circuits using sequentially triggered mode-based design | |
Guo et al. | Investigation of obfuscation-based anti-reverse engineering for printed circuit boards | |
Yasin et al. | Hardware security and trust: logic locking as a design-for-trust solution | |
Knechtel et al. | Protect your chip design intellectual property: An overview | |
Xie et al. | Security-aware 2.5 D integrated circuit design flow against hardware IP piracy | |
Limaye et al. | Fa-SAT: Fault-aided SAT-based attack on compound logic locking techniques | |
Kumar et al. | Detection of hardware Trojan in SEA using path delay |