[go: up one dir, main page]
More Web Proxy on the site http://driver.im/

Salauyou, 2023 - Google Patents

Structural models of Mealy finite state machines detecting faults in control systems

Salauyou, 2023

View PDF
Document ID
1123555385420989263
Author
Salauyou V
Publication year
Publication venue
Radioelectronic and Computer Systems

External Links

Snippet

The subject matter of this article is a control system for unmanned aerial vehicles (UAVs) whose mathematical model is a finite state machine (FSM). The goal is to develop FSM structural models that enable (1) detection of multiple faults of FSM elements caused by an …
Continue reading at nti.khai.edu (PDF) (other versions)

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRICAL DIGITAL DATA PROCESSING
    • G06F17/00Digital computing or data processing equipment or methods, specially adapted for specific functions
    • G06F17/50Computer-aided design
    • G06F17/5009Computer-aided design using simulation
    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRICAL DIGITAL DATA PROCESSING
    • G06F17/00Digital computing or data processing equipment or methods, specially adapted for specific functions
    • G06F17/50Computer-aided design
    • G06F17/5045Circuit design
    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRICAL DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/07Error detection; Error correction; Monitoring responding to the occurence of a fault, e.g. fault tolerance
    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRICAL DIGITAL DATA PROCESSING
    • G06F7/00Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRICAL DIGITAL DATA PROCESSING
    • G06F1/00Details of data-processing equipment not covered by groups G06F3/00 - G06F13/00, e.g. cooling, packaging or power supply specially adapted for computer application
    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRICAL DIGITAL DATA PROCESSING
    • G06F2217/00Indexing scheme relating to computer aided design [CAD]
    • G06F2217/70Fault tolerant, i.e. transient fault suppression
    • HELECTRICITY
    • H03BASIC ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K19/00Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/003Modifications for increasing the reliability for protection
    • H03K19/0033Radiation hardening
    • H03K19/00338In field effect transistor circuits
    • HELECTRICITY
    • H03BASIC ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K19/00Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/007Fail-safe circuits
    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRICAL DIGITAL DATA PROCESSING
    • G06F2207/00Indexing scheme relating to methods or arrangements for processing data by operating upon the order or content of the data handled

Similar Documents

Publication Publication Date Title
de Lima Kastensmidt et al. Designing fault-tolerant techniques for SRAM-based FPGAs
Mitra et al. Word-voter: a new voter design for triple modular redundant systems
Shanbhag et al. Stochastic computation
US7301362B2 (en) Duplicated double checking production rule set for fault-tolerant electronics
Tiwari et al. Enhanced reliability of finite-state machines in FPGA through efficient fault detection and correction
Hahanov et al. Qubit Model for solving the coverage problem
Pilotto et al. Synchronizing triple modular redundant designs in dynamic partial reconfiguration applications
She et al. Notice of Violation of IEEE Publication Principles: Selective Triple Modular Redundancy for Single Event Upset (SEU) Mitigation
Portaluri et al. A New Domains-based Isolation Design Flow for Reconfigurable SoCs
Sootkaneung et al. Soft error reduction through gate input dependent weighted sizing in combinational circuits
Salauyou Structural models of Mealy finite state machines detecting faults in control systems
Augustin et al. Implementation of selective fault tolerance with conventional synthesis tools
Jafri et al. Design of the coarse-grained reconfigurable architecture DART with on-line error detection
Salauyou Fault Detection of Moore Finite State Machines by Structural Models
Krishnamohan et al. Combining error masking and error detection plus recovery to combat soft errors in static CMOS circuits
Niknahad et al. A study on fine granular fault tolerance methodologies for FPGAs
Deepanjali et al. Self healing controllers to mitigate SEU in the control path of FPGA based system: A complete intrinsic evolutionary approach
Salauyou Structural models for fault detection of Moore finite state machines
Sooraj et al. Fault tolerant FSM on FPGA using SEC-DED code algorithm
Solov’ev Structural models for failure detection of Moore finite-state machines
Anjankar et al. Real-time FPGA-based fault tolerant and recoverable technique for arithmetic design using functional triple modular redundancy (FRTMR)
Mahzoon et al. Polynomial formal verification of general tree-like circuits
Fouad et al. Context-aware resources placement for SRAM-based FPGA to minimize checkpoint/recovery overhead
Rahman Cost efficient fault tolerant decoder in reversible logic synthesis
Salauyou Description styles of fault-tolerant finite state machines for unmanned aerial vehicles