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Mock et al., 2005 - Google Patents

An empirical study of data speculation use on the intel itanium 2 processor

Mock et al., 2005

View PDF
Document ID
10355687905051415973
Author
Mock M
Villamarin R
Baiocchi J
Publication year
Publication venue
9th Annual Workshop on Interaction between Compilers and Computer Architectures (INTERACT'05)

External Links

Snippet

The Intel Itanium architecture uses a dedicated 32-entry hardware table, the advanced load address table (ALAT) to support data speculation via an instruction set interface. This study presents an empirical evaluation of the use of the ALAT and data speculative instructions for …
Continue reading at citeseerx.ist.psu.edu (PDF) (other versions)

Classifications

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    • G06F9/30Arrangements for executing machine-instructions, e.g. instruction decode
    • G06F9/38Concurrent instruction execution, e.g. pipeline, look ahead
    • G06F9/3836Instruction issuing, e.g. dynamic instruction scheduling, out of order instruction execution
    • G06F9/3842Speculative instruction execution
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