Khachikyan et al., 2018 - Google Patents
Precise duty cycle variation detection and self-calibration system for high-speed data linksKhachikyan et al., 2018
- Document ID
- 10076183741854617448
- Author
- Khachikyan K
- Balabanyan A
- Gumroyan H
- Publication year
- Publication venue
- 2018 IEEE Computer Society Annual Symposium on VLSI (ISVLSI)
External Links
Snippet
A design and simulation methodology that detects and compensates duty cycle deviations is presented. The proposed method provides robust mechanism to reduce transmission line adverse effects and improves received signal quality. A mixed signal approach, where an …
- 238000001514 detection method 0 title description 9
Classifications
-
- H—ELECTRICITY
- H03—BASIC ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K5/00—Manipulating pulses not covered by one of the other main groups in this subclass
- H03K5/13—Arrangements having a single output and transforming input signals into pulses delivered at desired time intervals
- H03K5/131—Digitally controlled
-
- H—ELECTRICITY
- H03—BASIC ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K5/00—Manipulating pulses not covered by one of the other main groups in this subclass
- H03K2005/00013—Delay, i.e. output pulse is delayed after input pulse and pulse length of output pulse is dependent on pulse length of input pulse
- H03K2005/00019—Variable delay
-
- H—ELECTRICITY
- H03—BASIC ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K5/00—Manipulating pulses not covered by one of the other main groups in this subclass
- H03K5/156—Arrangements in which a continuous pulse train is transformed into a train having a desired pattern
- H03K5/1565—Arrangements in which a continuous pulse train is transformed into a train having a desired pattern the output pulses having a constant duty cycle
-
- H—ELECTRICITY
- H03—BASIC ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M1/00—Analogue/digital conversion; Digital/analogue conversion
- H03M1/12—Analogue/digital converters
- H03M1/124—Sampling or signal conditioning arrangements specially adapted for A/D converters
- H03M1/1245—Details of sampling arrangements or methods
-
- H—ELECTRICITY
- H03—BASIC ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M1/00—Analogue/digital conversion; Digital/analogue conversion
- H03M1/10—Calibration or testing
- H03M1/1009—Calibration
-
- H—ELECTRICITY
- H03—BASIC ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M1/00—Analogue/digital conversion; Digital/analogue conversion
- H03M1/66—Digital/analogue converters
-
- H—ELECTRICITY
- H03—BASIC ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
- H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
-
- H—ELECTRICITY
- H03—BASIC ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
- H03K3/01—Details
-
- H—ELECTRICITY
- H03—BASIC ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K5/00—Manipulating pulses not covered by one of the other main groups in this subclass
- H03K5/01—Shaping pulses
-
- H—ELECTRICITY
- H03—BASIC ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M1/00—Analogue/digital conversion; Digital/analogue conversion
- H03M1/06—Continuously compensating for, or preventing, undesired influence of physical parameters
- H03M1/0617—Continuously compensating for, or preventing, undesired influence of physical parameters characterised by the use of methods or means not specific to a particular type of detrimental influence
-
- H—ELECTRICITY
- H03—BASIC ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K5/00—Manipulating pulses not covered by one of the other main groups in this subclass
- H03K5/15—Arrangements in which pulses are delivered at different times at several outputs, i.e. pulse distributors
-
- H—ELECTRICITY
- H03—BASIC ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K5/00—Manipulating pulses not covered by one of the other main groups in this subclass
- H03K5/22—Circuits having more than one input and one output for comparing pulses or pulse trains with each other according to input signal characteristics, e.g. slope, integral
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/317—Testing of digital circuits
- G01R31/3181—Functional testing
-
- H—ELECTRICITY
- H03—BASIC ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
-
- H—ELECTRICITY
- H03—BASIC ELECTRONIC CIRCUITRY
- H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
- H03H11/00—Networks using active elements
- H03H11/02—Multiple-port networks
- H03H11/26—Time-delay networks
Similar Documents
Publication | Publication Date | Title |
---|---|---|
KR101215760B1 (en) | Time measurement circuit, time measurement method, time digital converter and test device using the same | |
US9543976B2 (en) | Time-interleaved analog-to-digital converter | |
US9781368B2 (en) | Ramp voltage generator, image sensing device including the same and method for driving the image sensing device | |
US9258009B2 (en) | AD converter | |
KR102593926B1 (en) | Gray code generator | |
CN114937433B (en) | LED display screen constant current drive circuit, drive chip and electronic equipment | |
JP2010045579A (en) | Comparator circuit, and analog digital converter having the same | |
JP2012114716A (en) | Tdc device and method of calibrating tdc | |
TWI385398B (en) | Test apparatus and measurement circuit | |
JP7488860B2 (en) | Electronic Circuit | |
JP2008236724A (en) | Circuit to reduce duty cycle distortion | |
Macpherson et al. | A 2.5 GS/s 3-bit time-based ADC in 90nm CMOS | |
CN105406868B (en) | Adaptive timing for analog-to-digital conversion | |
Morales et al. | Design and evaluation of an all-digital programmable delay line in 130-nm CMOS | |
Khachikyan et al. | Precise duty cycle variation detection and self-calibration system for high-speed data links | |
US5528186A (en) | Timing generator using digital signals to obtain accurate delay time and high resolution | |
US8669897B1 (en) | Asynchronous successive approximation register analog-to-digital converter and operating method thereof | |
CN116438743A (en) | Calibrating phase interpolators by amplifying time differences | |
US7965209B2 (en) | A/D conversion circuit and A/D conversion method | |
US11500336B1 (en) | Methods and apparatus for low jitter fractional output dividers | |
US20210367596A1 (en) | Impedance calibration circuit | |
Nelson et al. | On-chip calibration technique for delay line based BIST jitter measurement | |
US10840928B2 (en) | Stochastic time-to-digital converter and operating method thereof | |
JP7528118B2 (en) | Switch leakage compensation circuit | |
Szplet et al. | Interpolating time counter with multi-edge coding |