Sharma, 2017 - Google Patents
Circuit Level Modeling of Spintronic DevicesSharma, 2017
View PDF- Document ID
- 9815259365899006447
- Author
- Sharma N
- Publication year
External Links
Snippet
It is an exciting time for circuit designers working on beyond-CMOS logic and memory design. Many alternative technologies to conventional Complementary Metal Oxide Semiconductor (CMOS) technology have been proposed in recent years and there is an …
- 239000004065 semiconductor 0 abstract description 20
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/02—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements
- G11C11/16—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using elements in which the storage effect is based on magnetic spin effect
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/02—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements
- G11C11/14—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using thin-film elements
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R33/00—Arrangements or instruments for measuring magnetic variables
- G01R33/02—Measuring direction or magnitude of magnetic fields or magnetic flux
- G01R33/06—Measuring direction or magnitude of magnetic fields or magnetic flux using galvano-magnetic devices, e.g. Hall effect devices; using magneto-resistive devices
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C19/00—Digital stores in which the information is moved stepwise, e.g. shift register stack stores, push-down stores
- G11C19/02—Digital stores in which the information is moved stepwise, e.g. shift register stack stores, push-down stores using magnetic elements
- G11C19/08—Digital stores in which the information is moved stepwise, e.g. shift register stack stores, push-down stores using magnetic elements using thin films in plane structure
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R33/00—Arrangements or instruments for measuring magnetic variables
- G01R33/12—Measuring magnetic properties of articles or specimens of solids or fluids
- G01R33/1284—Spin resolved measurements; Influencing spins during measurements, e.g. in spintronics devices
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING; COUNTING
- G06F—ELECTRICAL DIGITAL DATA PROCESSING
- G06F17/00—Digital computing or data processing equipment or methods, specially adapted for specific functions
- G06F17/50—Computer-aided design
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C14/00—Digital stores characterised by arrangements of cells having volatile and non-volatile storage properties for back-up when the power is down
- G11C14/0054—Digital stores characterised by arrangements of cells having volatile and non-volatile storage properties for back-up when the power is down in which the volatile element is a SRAM cell
-
- H—ELECTRICITY
- H01—BASIC ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H01L43/00—Devices using galvano-magnetic or similar magnetic effects; Processes or apparatus peculiar to the manufacture or treatment thereof or of parts thereof
- H01L43/02—Details
Similar Documents
Publication | Publication Date | Title |
---|---|---|
Joshi et al. | From MTJ device to hybrid CMOS/MTJ circuits: A review | |
Shi et al. | Electrical manipulation of the magnetic order in antiferromagnetic PtMn pillars | |
Kang et al. | Spintronics: Emerging ultra-low-power circuits and systems beyond MOS technology | |
Wang et al. | Compact modeling of perpendicular-magnetic-anisotropy double-barrier magnetic tunnel junction with enhanced thermal stability recording structure | |
Kang et al. | Emerging materials and devices in spintronic integrated circuits for energy-smart mobile computing and connectivity | |
Bromberg et al. | Novel STT-MTJ device enabling all-metallic logic circuits | |
US9208845B2 (en) | Low energy magnetic domain wall logic device | |
Jabeur et al. | Compact modeling of a magnetic tunnel junction based on spin orbit torque | |
Ben-Romdhane et al. | Design and analysis of racetrack memory based on magnetic domain wall motion in nanowires | |
Kang et al. | An overview of spin-based integrated circuits | |
Deng et al. | Robust magnetic full-adder with voltage sensing 2T/2MTJ cell | |
Prenat et al. | CMOS/magnetic hybrid architectures | |
El Baraji et al. | Dynamic compact model of thermally assisted switching magnetic tunnel junctions | |
Jovanović et al. | Comparative analysis of MTJ/CMOS hybrid cells based on TAS and in-plane STT magnetic tunnel junctions | |
Bruchon et al. | New nonvolatile FPGA concept using magnetic tunneling junction | |
Afuye et al. | Modeling and circuit design of associative memories with spin–orbit torque fets | |
Jabeur et al. | Study of spin transfer torque (STT) and spin orbit torque (SOT) magnetic tunnel junctions (MTJS) at advanced CMOS technology nodes | |
Cai et al. | Addressing failure and aging degradation in MRAM/MeRAM-on-FDSOI integration | |
Sharma et al. | VerilogA based compact model of a three-terminal ME-MTJ device | |
Wang | Reliability analysis of spintronic device based logic and memory circuits | |
Kim et al. | Variation-tolerant sensing circuit for spin-transfer torque MRAM | |
Sharma | Circuit Level Modeling of Spintronic Devices | |
Cutugno et al. | Field-free magnetic tunnel junction for logic operations based on voltage-controlled magnetic anisotropy | |
Bruchon et al. | Magnetic tunnelling junction based FPGA | |
Bromberg | Current-Driven Magnetic Devices for Non-Volatile Logic and Memory. |