van der Wal et al., 1985 - Google Patents
Real time pyramid transform architecturevan der Wal et al., 1985
- Document ID
- 9433006433519952401
- Author
- van der Wal G
- Sinniger J
- Publication year
- Publication venue
- Intelligent Robots and Computer Vision IV
External Links
Snippet
This paper describes an architecture for creating pyramid transforms of real time video images. A powerful preprocessor can be designed with this architecture by representing the image data in a form most suitable for the application. The Burt pyramid algorithm [1], an …
- 230000000694 effects 0 abstract description 9
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING; COUNTING
- G06T—IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
- G06T9/00—Image coding, e.g. from bit-mapped to non bit-mapped
- G06T9/007—Transform coding, e.g. discrete cosine transform
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING; COUNTING
- G06F—ELECTRICAL DIGITAL DATA PROCESSING
- G06F17/00—Digital computing or data processing equipment or methods, specially adapted for specific functions
- G06F17/10—Complex mathematical operations
- G06F17/14—Fourier, Walsh or analogous domain transformations, e.g. Laplace, Hilbert, Karhunen-Loeve, transforms
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING; COUNTING
- G06T—IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
- G06T5/00—Image enhancement or restoration, e.g. from bit-mapped to bit-mapped creating a similar image
- G06T5/20—Image enhancement or restoration, e.g. from bit-mapped to bit-mapped creating a similar image by the use of local operators
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING; COUNTING
- G06T—IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
- G06T1/00—General purpose image data processing
- G06T1/20—Processor architectures; Processor configuration, e.g. pipelining
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING; COUNTING
- G06T—IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
- G06T3/00—Geometric image transformation in the plane of the image, e.g. from bit-mapped to bit-mapped creating a different image
- G06T3/40—Scaling the whole image or part thereof
Similar Documents
Publication | Publication Date | Title |
---|---|---|
EP1032913B1 (en) | Video encoding device | |
CA1254659A (en) | Programmed implementation of real-time multiresolution signal processing apparatus | |
US4601055A (en) | Image processor | |
EP0005954A1 (en) | Method and apparatus for improved digital image processing | |
US5684534A (en) | Task-splitting dual-processor system for motion estimation processing | |
Van Der Wal et al. | A VLSI pyramid chip for multiresolution image analysis | |
US5099325A (en) | Process and circuit for block matching in two-dimensional picture signals | |
US5469208A (en) | Dequantization using decrements and multiply | |
US6223193B1 (en) | Macroblock variance estimator for MPEG-2 video encoder | |
US5610849A (en) | Real time two-dimensional discrete cosine transform/inverse discrete cosine transform circuit | |
US4791677A (en) | Image signal processor | |
van der Wal et al. | Real time pyramid transform architecture | |
US5163100A (en) | Image processing circuit with reduced number of contact pads | |
US6009447A (en) | Method and system for generating and implementing orientational filters for real-time computer vision applications | |
US6587589B1 (en) | Architecture for performing two-dimensional discrete wavelet transform | |
Lafruit et al. | An efficient VLSI architecture for 2-D wavelet image coding with novel image scan | |
Huang et al. | Astronomical image data compression by morphological skeleton transformation | |
Burt et al. | A pipelined pyramid machine | |
US6304679B1 (en) | Method and apparatus for implementing two-dimensional digital filters | |
DE69030706T2 (en) | Circuit for continuous video signal processing in a synchronous vector processor | |
Hasebe et al. | Architecture of SIPS, a real time image processing system | |
Zhang et al. | VLSI implementation of high speed two-dimensional state-space recursive filtering | |
Buxton et al. | Parallel computations of optic flow in early image processing | |
Kubota et al. | A vision system with real-time feature extractor and relaxation network | |
Borghesi et al. | Modular Architecture for a Fast 2D Convolver |