[go: up one dir, main page]
More Web Proxy on the site http://driver.im/

He et al., 2016 - Google Patents

Extracting characteristic impedance of a transmission line referenced to a meshed ground plane

He et al., 2016

Document ID
9371059023702127994
Author
He J
Hwang C
Pan J
Cho G
Bae B
Park H
Fan J
Publication year
Publication venue
2016 IEEE International Symposium on Electromagnetic Compatibility (EMC)

External Links

Snippet

Meshed power and ground planes are commonly used in today's flexible printed circuit board (PCB). In this paper, a methodology to extract the effective characteristic impedance as well as the per-unit-length parameters of a transmission line with a meshed reference …
Continue reading at ieeexplore.ieee.org (other versions)

Classifications

    • H—ELECTRICITY
    • H01—BASIC ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING; COUNTING
    • G06F—ELECTRICAL DIGITAL DATA PROCESSING
    • G06F17/00—Digital computing or data processing equipment or methods, specially adapted for specific functions
    • G06F17/50—Computer-aided design
    • G06F17/5009—Computer-aided design using simulation
    • G06F17/5036—Computer-aided design using simulation for analog modelling, e.g. for circuits, spice programme, direct methods, relaxation methods
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0213—Electrical arrangements not otherwise provided for
    • H05K1/0237—High frequency adaptations
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0296—Conductive pattern lay-out details not covered by sub groups H05K1/02 - H05K1/0295
    • H—ELECTRICITY
    • H01—BASIC ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H—ELECTRICITY
    • H01—BASIC ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30—Technical effects
    • H—ELECTRICITY
    • H01—BASIC ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/58—Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout

Similar Documents

Publication Publication Date Title
He et al. Extracting characteristic impedance of a transmission line referenced to a meshed ground plane
Eudes et al. Transient response characterization of the high-speed interconnection RLCG-model for the signal integrity analysis
Che et al. Investigation of segmentation method for enhancing high frequency simulation accuracy of Q3D extractor
Wu et al. Modeling and analysis of a trace referenced to a meshed ground plane
Kim et al. Wideband and compact EBG structure with balanced slots
Tan et al. Time-domain analysis of noise coupling between package and PCB power/ground planes based on WLP-FDTD
Roy et al. Efficient modeling of power/ground planes using delay-extraction-based transmission lines
Dahl et al. Efficient total crosstalk analysis of large via arrays in silicon interposers
Han et al. Pinwheel meander-perforated plane structure for mitigating power/ground noise in system-in-package
Mudavath et al. Analysis of crosstalk noise for coupled microstrip interconnect models in high-speed PCB design
Cai et al. A study of coverlay coated microstrip lines for crosstalk reduction in DDR5
Kuo et al. High impedance design and investigation using TDR for fine lines on high density organic substrate
Kim et al. High-frequency-measurement-based circuit modeling and power/ground integrity evaluation of integrated circuit packages
US9408304B2 (en) Through printed circuit board (PCB) vias
Zuo et al. Quantification of EMI for power-ground plane and novel EBG structure for SSN suppression
CN117195792A (en) Broadband equivalent circuit model of passive device, parameter extraction method and system
Famoriji et al. Transmission line characterization and modeling for electronic circuits and systems design
Engin et al. Power archipelago for filtering power plane noise
Lin et al. Model extractions of coupled bonding-wire structures in electronic packaging
Gan et al. The Crosstalk Analysis of FPGA High-Speed Signals with Generic Pre-layout Modeling
Barik et al. Impact Of Via And Materials On Signal Integrity
Chen et al. Enabling terabit per second switch linecard design through chip/package/PCB co-design
Rotaru et al. Analysis of trench ground structures for cross talk reduction in high speed single ended bus
Kim et al. Electromagnetic bandgap design for power distribution network noise isolation in the glass interposer
Yao et al. Modeling Slow-Wave CPWs on silicon up to 60 GHz