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Parihar et al., 2017 - Google Patents

Low-power Z2-FET capacitorless 1T-DRAM

Parihar et al., 2017

Document ID
9071725273588325993
Author
Parihar M
Lee K
El Dirani H
Navarro C
Lacord J
Martinie S
Barbe J
Fonteneau P
Galy P
Le Royer C
Mescot X
Gamiz F
Cheng B
Asenov A
Taur Y
Bawedin M
Cristoloveanu S
Publication year
Publication venue
2017 IEEE International Memory Workshop (IMW)

External Links

Snippet

This work highlights the features of Z2-FET capacitorless 1T-DRAM describing its operation in detail. The Z2-FET memory cell fabricated with FDSOI technology delivers large current sense margin along with long retention time at room temperature. Numerous measurements …
Continue reading at ieeexplore.ieee.org (other versions)

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    • H01L27/108Dynamic random access memory structures
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