[go: up one dir, main page]
More Web Proxy on the site http://driver.im/

Lin et al., 2007 - Google Patents

High speed soft-error-tolerant latch and flip-flop design for multiple VDD circuit

Lin et al., 2007

Document ID
8837160763813139123
Author
Lin S
Yang H
Luo R
Publication year
Publication venue
IEEE Computer Society Annual Symposium on VLSI (ISVLSI'07)

External Links

Snippet

In this paper, a novel soft-error-tolerant latch and a novel soft-error-tolerant flip-flop are presented for multiple VDD circuit design. By utilizing local redundancy, the latch and the flip- flop can recover from soft errors caused by cosmic rays and particle strikes. By using output …
Continue reading at ieeexplore.ieee.org (other versions)

Classifications

    • H—ELECTRICITY
    • H03—BASIC ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
    • H03K3/353—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of field-effect transistors with internal or external positive feedback
    • H03K3/356—Bistable circuits
    • H03K3/356104—Bistable circuits using complementary field-effect transistors
    • H03K3/356113—Bistable circuits using complementary field-effect transistors using additional transistors in the input circuit
    • H03K3/356147—Bistable circuits using complementary field-effect transistors using additional transistors in the input circuit using pass gates
    • H—ELECTRICITY
    • H03—BASIC ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
    • H03K3/353—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of field-effect transistors with internal or external positive feedback
    • H03K3/356—Bistable circuits
    • H03K3/356104—Bistable circuits using complementary field-effect transistors
    • H03K3/356113—Bistable circuits using complementary field-effect transistors using additional transistors in the input circuit
    • H03K3/356121—Bistable circuits using complementary field-effect transistors using additional transistors in the input circuit with synchronous operation
    • H—ELECTRICITY
    • H03—BASIC ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
    • H03K3/027—Generators characterised by the type of circuit or by the means used for producing pulses by the use of logic circuits, with internal or external positive feedback
    • H03K3/037—Bistable circuits
    • H03K3/0375—Bistable circuits provided with means for increasing reliability; for protection; for ensuring a predetermined initial state when the supply voltage has been applied; for storing the actual state when the supply voltage fails
    • H—ELECTRICITY
    • H03—BASIC ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/08—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices
    • H03K19/094—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors
    • H03K19/096—Synchronous circuits, i.e. using clock signals
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING; COUNTING
    • G06F—ELECTRICAL DIGITAL DATA PROCESSING
    • G06F17/00—Digital computing or data processing equipment or methods, specially adapted for specific functions
    • G06F17/50—Computer-aided design
    • H—ELECTRICITY
    • H03—BASIC ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/01—Details
    • H03K3/012—Modifications of generator to improve response time or to decrease power consumption
    • H—ELECTRICITY
    • H03—BASIC ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/003—Modifications for increasing the reliability for protection
    • H03K19/0033—Radiation hardening
    • H03K19/00338—In field effect transistor circuits
    • H—ELECTRICITY
    • H03—BASIC ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/003—Modifications for increasing the reliability for protection
    • H03K19/00323—Delay compensation
    • H—ELECTRICITY
    • H03—BASIC ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/173—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
    • H03K19/1733—Controllable logic circuits
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING; COUNTING
    • G06F—ELECTRICAL DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING; COUNTING
    • G06F—ELECTRICAL DIGITAL DATA PROCESSING
    • G06F2217/00—Indexing scheme relating to computer aided design [CAD]
    • G06F2217/70—Fault tolerant, i.e. transient fault suppression

Similar Documents

Publication Publication Date Title
US20090295448A1 (en) Radiation Hardened CMOS Master Latch With Redundant Clock Input Circuits and Design Structure Therefor
US7362154B2 (en) Radiation hardened latch
Lin et al. High speed soft-error-tolerant latch and flip-flop design for multiple VDD circuit
Mahmoodi-Meimand et al. Self-precharging flip-flop (SPFF): A new level converting flip-flop
Stojanovic et al. A unified approach in the analysis of latches and flip-flops for low-power systems
Lin et al. A new family of sequential elements with built-in soft error tolerance for dual-VDD systems
Bhargavaram et al. Low power dual edge triggered flip-flop
Devarapalli et al. SEU-hardened dual data rate flip-flop using C-elements
Stojanovic et al. Comparative analysis of latches and flip-flops for high-performance systems
Sudheer et al. Design and implementation of embedded logic flip-flop for low power applications
Rahiminejad et al. Low-power pulsed hybrid flip-flop based on a C-element
Wang et al. Low Power Explicit-Pulsed Single-Phase-Clocking Dual-edge-triggering Pulsed Latch Using Transmission Gate
Pal et al. Energy efficient design of direct coupled pass transistor based pulse triggered flip-flop
Ghadiri et al. Comparative energy and delay of energy recovery and square wave clock flip-flops for high-performance and low-power applications
Shah et al. Comparative Analysis of Dual-edge Triggered and Sense Amplifier Based Flip-flops in 32 nm CMOS Regime
Juneja et al. High-performance and low-power clock branch sharing pseudo-nmos level converting flip-flop
Abhishek et al. Low Power DET Flip-Flops Using C-Element
Kumar et al. Static low-power 17t true single phase clocking flip-flop based on logic structure optimization
Archana et al. Analysis of DICE latch based shift register
Palakurthi et al. Radiation hardened level shifter for sub to superthreshold voltage translation
REDDY DESIGN OF POWER-EFFICIENT TRUE SINGLE PHASE CLOCKING FLIP-FLOP USING 19–TRANSISTOR BASED ON LOGIC STRUCTURE REDUCTION SCHEME
Gopika et al. Efficient Design and Analysis of Dual-Edge Triggered Flip-Flop for Advanced VLSI Systems
Veena et al. Low Power Single-Phase-Clock Flip Flop
Manju et al. Check for updates Power Efficient Pulse Triggered Flip-Flop Design Using Pass Transistor Logic
Saravanan et al. Design of Low Power Flip Flop and Implementation in a 4-bit Counter