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Huang et al., 2001 - Google Patents

L1 data cache decomposition for energy efficiency

Huang et al., 2001

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Document ID
8813154903996891959
Author
Huang M
Renau J
Yoo S
Torrellas J
Publication year
Publication venue
Proceedings of the 2001 international symposium on Low power electronics and design

External Links

Snippet

The L1 data cache is a time-critical module and, at the same time, a major consumer of energy. To reduce its energy-delay product, we apply two principles of low-power design: specialize part of the cache structure and break the cache down into smaller caches. To this …
Continue reading at citeseerx.ist.psu.edu (PDF) (other versions)

Classifications

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    • G06F12/0802Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0862Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches with prefetch
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    • G06F12/0875Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches with dedicated cache, e.g. instruction or stack
    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
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    • G06F9/00Arrangements for programme control, e.g. control unit
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    • G06F1/26Power supply means, e.g. regulation thereof
    • G06F1/32Means for saving power
    • G06F1/3203Power Management, i.e. event-based initiation of power-saving mode
    • G06F1/3234Action, measure or step performed to reduce power consumption
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