[go: up one dir, main page]
More Web Proxy on the site http://driver.im/

Wang et al., 2009 - Google Patents

Optical and electrical evaluations of SiGe layers on insulator fabricated using Ge condensation by dry oxidation

Wang et al., 2009

Document ID
8316560299545862365
Author
Wang D
Nakashima H
Publication year
Publication venue
Solid-state electronics

External Links

Snippet

Photoluminescence (PL) and dual-metal-oxide-semiconductor (dual-MOS) deep level transient spectroscopy (DLTS) evaluations were performed for SiGe layers on insulator fabricated using Ge condensation by dry oxidation. Defect generation and transformation …
Continue reading at www.sciencedirect.com (other versions)

Classifications

    • H—ELECTRICITY
    • H01—BASIC ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/02521—Materials
    • H01L21/02524—Group 14 semiconducting materials
    • H01L21/02532—Silicon, silicon germanium, germanium
    • H—ELECTRICITY
    • H01—BASIC ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer, carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer, carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/26—Bombardment with radiation
    • H01L21/263—Bombardment with radiation with high-energy radiation
    • H01L21/265—Bombardment with radiation with high-energy radiation producing ion implantation
    • H01L21/26506—Bombardment with radiation with high-energy radiation producing ion implantation in group IV semiconductors
    • H—ELECTRICITY
    • H01—BASIC ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
    • H01L21/76251—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
    • H—ELECTRICITY
    • H01—BASIC ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer, carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer, carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H—ELECTRICITY
    • H01—BASIC ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02367—Substrates
    • H01L21/0237—Materials
    • H—ELECTRICITY
    • H01—BASIC ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H—ELECTRICITY
    • H01—BASIC ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies; Multistep manufacturing processes therefor
    • H—ELECTRICITY
    • H01—BASIC ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L31/00—Semiconductor devices sensitive to infra-red radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus peculiar to the manufacture or treatment thereof or of parts thereof; Details thereof

Similar Documents

Publication Publication Date Title
Ghyselen et al. Engineering strained silicon on insulator wafers with the Smart CutTM technology
EP2087521B1 (en) LOW DEFECT Si:C LAYER WITH RETROGRADE CARBON PROFILE
Perova et al. Composition and strain in thin Si1− xGex virtual substrates measured by micro-Raman spectroscopy and x-ray diffraction
US20080311686A1 (en) Method of Forming Semiconductor Layers on Handle Substrates
Hartmann et al. Structural, electrical and optical properties of in-situ phosphorous-doped Ge layers
Bogumilowicz et al. High germanium content SiGe virtual substrates grown at high temperatures
Delhougne et al. Selective epitaxial deposition of strained silicon: a simple and effective method for fabricating high performance MOSFET devices
Wang et al. Optical and electrical evaluations of SiGe layers on insulator fabricated using Ge condensation by dry oxidation
Chen et al. Ultrathin low temperature Si0. 75Ge0. 25/Si buffer layer for the growth of high quality Ge epilayer on Si (100) by RPCVD
Richter et al. GaAs on 200 mm Si wafers via thin temperature graded Ge buffers by molecular beam epitaxy
Rykov et al. Structural and optical characteristics of GaAs films grown on Si/Ge substrates
Wang et al. Photoluminescence and TEM evaluations of defects generated during SiGe-on-insulator virtual substrate fabrication: Temperature ramping process
Kuchenbecker et al. Thin SiGe buffer layer growth by in situ low energy hydrogen plasma preparation
Ye et al. Ge-on-insulator wafer with ultralow defect density fabricated by direct condensation of SiGe-on-insulator structure
Reiche et al. Structure and properties of dislocations in interfaces of bonded silicon wafers
Sawano et al. Strained Si n-channel metal-oxide-semiconductor field-effect transistors formed on very thin SiGe relaxed layer fabricated by ion implantation technique
Wang et al. Defect characterization and control for SiGe-on-insulator
Nakashima et al. Optical and Electrical Characterizations of Defects in SiGe-on-insulator
Romanjuk et al. Enhanced relaxation of SiGe layers by He implantation supported by in situ ultrasonic treatments
Caymax et al. Non-selective thin SiGe strain-relaxed buffer layers: Growth and carbon-induced relaxation
Paillard et al. Strain characterization of strained silicon on insulator wafers
Wang et al. Photoluminescence Characterization of Strained Si–SiGe-on-Insulator Wafers
Wang et al. Photoluminescence evaluation of defects generated during temperature ramp-up process of SiGe-on-insulator virtual substrate fabrication
Nakagawa-Toyota et al. Characterization of light element impurities in ultrathin silicon-on-insulator layers by luminescence activation using electron irradiation
Nezhdanov et al. Raman spectroscopy of amorphous silicon subjected to laser annealing