[go: up one dir, main page]
More Web Proxy on the site http://driver.im/

Szplet et al., 2009 - Google Patents

An FPGA-integrated time-to-digital converter based on two-stage pulse shrinking

Szplet et al., 2009

Document ID
803574602601725453
Author
Szplet R
Klepacki K
Publication year
Publication venue
IEEE Transactions on Instrumentation and Measurement

External Links

Snippet

We present the design and test results of a new time-to-digital converter based on the cyclic pulse shrinking method and implemented in a field-programmable gate array (FPGA) device. The pulse shrinking is realized in a loop containing two complementary delay lines …
Continue reading at ieeexplore.ieee.org (other versions)

Classifications

    • HELECTRICITY
    • H03BASIC ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00Analogue/digital conversion; Digital/analogue conversion
    • H03M1/12Analogue/digital converters
    • H03M1/14Conversion in steps with each step involving the same or a different conversion means and delivering more than one bit
    • HELECTRICITY
    • H03BASIC ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00Analogue/digital conversion; Digital/analogue conversion
    • H03M1/12Analogue/digital converters
    • H03M1/34Analogue value compared with reference values
    • H03M1/36Analogue value compared with reference values simultaneously only, i.e. parallel type
    • H03M1/361Analogue value compared with reference values simultaneously only, i.e. parallel type having a separate comparator and reference value for each quantisation level, i.e. full flash converter type
    • HELECTRICITY
    • H03BASIC ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00Analogue/digital conversion; Digital/analogue conversion
    • H03M1/12Analogue/digital converters
    • H03M1/124Sampling or signal conditioning arrangements specially adapted for A/D converters
    • H03M1/1245Details of sampling arrangements or methods
    • HELECTRICITY
    • H03BASIC ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00Analogue/digital conversion; Digital/analogue conversion
    • H03M1/12Analogue/digital converters
    • H03M1/50Analogue/digital converters with intermediate conversion to time interval
    • HELECTRICITY
    • H03BASIC ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00Analogue/digital conversion; Digital/analogue conversion
    • H03M1/66Digital/analogue converters
    • HELECTRICITY
    • H03BASIC ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00Analogue/digital conversion; Digital/analogue conversion
    • H03M1/12Analogue/digital converters
    • H03M1/1205Multiplexed conversion systems
    • H03M1/121Interleaved, i.e. using multiple converters or converter parts for one channel
    • HELECTRICITY
    • H03BASIC ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00Analogue/digital conversion; Digital/analogue conversion
    • H03M1/06Continuously compensating for, or preventing, undesired influence of physical parameters
    • H03M1/08Continuously compensating for, or preventing, undesired influence of physical parameters of noise
    • H03M1/0836Continuously compensating for, or preventing, undesired influence of physical parameters of noise of phase error, e.g. jitter
    • HELECTRICITY
    • H03BASIC ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00Analogue/digital conversion; Digital/analogue conversion
    • H03M1/06Continuously compensating for, or preventing, undesired influence of physical parameters
    • H03M1/0617Continuously compensating for, or preventing, undesired influence of physical parameters characterised by the use of methods or means not specific to a particular type of detrimental influence
    • H03M1/0634Continuously compensating for, or preventing, undesired influence of physical parameters characterised by the use of methods or means not specific to a particular type of detrimental influence by averaging out the errors, e.g. using sliding scale
    • HELECTRICITY
    • H03BASIC ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00Analogue/digital conversion; Digital/analogue conversion
    • H03M1/10Calibration or testing
    • H03M1/1009Calibration
    • HELECTRICITY
    • H03BASIC ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00Analogue/digital conversion; Digital/analogue conversion
    • H03M1/004Reconfigurable analogue/digital or digital/analogue converters
    • HELECTRICITY
    • H03BASIC ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00Analogue/digital conversion; Digital/analogue conversion
    • H03M1/10Calibration or testing
    • H03M1/1071Measuring or testing
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317Testing of digital circuits
    • G01R31/3181Functional testing
    • HELECTRICITY
    • H03BASIC ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M3/00Conversion of analogue values to or from differential modulation
    • HELECTRICITY
    • H03BASIC ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K3/00Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • HELECTRICITY
    • H03BASIC ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00Automatic control of frequency or phase; Synchronisation

Similar Documents

Publication Publication Date Title
Szplet et al. An FPGA-integrated time-to-digital converter based on two-stage pulse shrinking
CN110045591B (en) Using time-to-digital converters with cyclic delay
Chen et al. A low-cost low-power CMOS time-to-digital converter based on pulse stretching
Kwiatkowski et al. Efficient implementation of multiple time coding lines-based TDC in an FPGA device
Song et al. A high-resolution time-to-digital converter implemented in field-programmable-gate-arrays
Hwang et al. A high-precision time-to-digital converter using a two-level conversion scheme
JP5561010B2 (en) Successive comparison type AD converter and method of adjusting operation clock of successive approximation type AD converter
Cui et al. A high-linearity, ring-oscillator-based, Vernier time-to-digital converter utilizing carry chains in FPGAs
Szplet et al. An eight-channel 4.5-ps precision timestamps-based time interval counter in FPGA chip
Chen et al. A 2.5-ps bin size and 6.7-ps resolution FPGA time-to-digital converter based on delay wrapping and averaging
KR20240051295A (en) High linearity phase interpolator
Keränen et al. A wide range, 4.2 ps (rms) precision CMOS TDC with cyclic interpolators based on switched-frequency ring oscillators
Jiang et al. Successive approximation time-to-digital converter with vernier-level resolution
Szplet et al. High-precision time digitizer based on multiedge coding in independent coding lines
Jansson et al. Enhancing nutt-based time-to-digital converter performance with internal systematic averaging
Szplet Time-to-digital converters
Ko et al. A 5-ps Vernier sub-ranging time-to-digital converter with DNL calibration
Perktold et al. A fine time-resolution (≪ 3 ps-rms) time-to-digital converter for highly integrated designs
Chaberski et al. Comparison of interpolators used for time-interval measurement systems based on multiple-tapped delay line
Nguyen et al. Three-step cyclic Vernier TDC using a pulse-shrinking inverter-assisted residue quantizer for low-complexity resolution enhancement
El-Hadbi et al. Time-to-digital converters: A literature review and new perspectives
Sesta et al. A novel sub-10 ps resolution TDC for CMOS SPAD array
Macpherson et al. A 2.5 GS/s 3-bit time-based ADC in 90nm CMOS
Wang et al. A Two-Stage Interpolation Time-to-Digital Converter Implemented in 20 and 28 N· m FGPAs
Morales et al. Design and evaluation of an all-digital programmable delay line in 130-nm CMOS