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Yan et al., 2014 - Google Patents

A reconfigurable processor architecture combining multi-core and reconfigurable processing units

Yan et al., 2014

Document ID
7104854047747298063
Author
Yan L
Wu B
Wen Y
Zhang S
Chen T
Publication year
Publication venue
Telecommunication Systems

External Links

Snippet

It'sa promising way to improve performance significantly by adding reconfigurable processing unit (RPU) to a general purpose processor. In this paper, a Reconfigurable Multi- Core (RMC) architecture combining general multi-core and reconfigurable logic is proposed …
Continue reading at link.springer.com (other versions)

Classifications

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    • G06F9/46Multiprogramming arrangements
    • G06F9/48Programme initiating; Programme switching, e.g. by interrupt
    • G06F9/4806Task transfer initiation or dispatching
    • G06F9/4843Task transfer initiation or dispatching by program, e.g. task dispatcher, supervisor, operating system
    • G06F9/4881Scheduling strategies for dispatcher, e.g. round robin, multi-level priority queues
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    • G06F9/5005Allocation of resources, e.g. of the central processing unit [CPU] to service a request
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