[go: up one dir, main page]
More Web Proxy on the site http://driver.im/

Ferreira et al., 2021 - Google Patents

pluto: In-dram lookup tables to enable massively parallel general-purpose computation

Ferreira et al., 2021

View PDF
Document ID
6384855665531056402
Author
Ferreira J
Falcao G
Gómez-Luna J
Alser M
Orosa L
Sadrosadati M
Kim J
Oliveira G
Shahroodi T
Nori A
Mutlu O
Publication year
Publication venue
arXiv preprint arXiv:2104.07699

External Links

Snippet

Data movement between main memory and the processor is a significant contributor to the execution time and energy consumption of memory-intensive applications. This data movement bottleneck can be alleviated using Processing-in-Memory (PiM), which enables …
Continue reading at www.academia.edu (PDF) (other versions)

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING; COUNTING
    • G06F—ELECTRICAL DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/76—Architectures of general purpose stored programme computers
    • G06F15/78—Architectures of general purpose stored programme computers comprising a single central processing unit
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING; COUNTING
    • G06F—ELECTRICAL DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for programme control, e.g. control unit
    • G06F9/06—Arrangements for programme control, e.g. control unit using stored programme, i.e. using internal store of processing equipment to receive and retain programme
    • G06F9/30—Arrangements for executing machine-instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/30007—Arrangements for executing specific machine instructions to perform operations on data operands
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING; COUNTING
    • G06F—ELECTRICAL DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for programme control, e.g. control unit
    • G06F9/06—Arrangements for programme control, e.g. control unit using stored programme, i.e. using internal store of processing equipment to receive and retain programme
    • G06F9/30—Arrangements for executing machine-instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline, look ahead
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING; COUNTING
    • G06F—ELECTRICAL DIGITAL DATA PROCESSING
    • G06F17/00—Digital computing or data processing equipment or methods, specially adapted for specific functions
    • G06F17/50—Computer-aided design
    • G06F17/5009—Computer-aided design using simulation
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING; COUNTING
    • G06F—ELECTRICAL DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING; COUNTING
    • G06F—ELECTRICAL DIGITAL DATA PROCESSING
    • G06F1/00—Details of data-processing equipment not covered by groups G06F3/00 - G06F13/00, e.g. cooling, packaging or power supply specially adapted for computer application
    • G06F1/26—Power supply means, e.g. regulation thereof
    • G06F1/32—Means for saving power
    • G06F1/3203—Power Management, i.e. event-based initiation of power-saving mode
    • G06F1/3234—Action, measure or step performed to reduce power consumption
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING; COUNTING
    • G06F—ELECTRICAL DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING; COUNTING
    • G06F—ELECTRICAL DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/406—Management or control of the refreshing or charge-regeneration cycles
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING; COUNTING
    • G06F—ELECTRICAL DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring

Similar Documents

Publication Publication Date Title
Ferreira et al. pluto: In-dram lookup tables to enable massively parallel general-purpose computation
Hajinazar et al. SIMDRAM: A framework for bit-serial SIMD processing using DRAM
Seshadri et al. Ambit: In-memory accelerator for bulk bitwise operations using commodity DRAM technology
Angizi et al. MRIMA: An MRAM-based in-memory accelerator
Simon et al. BLADE: An in-cache computing architecture for edge devices
Mutlu et al. Processing data where it makes sense: Enabling in-memory computation
Wang et al. 14.2 A compute SRAM with bit-serial integer/floating-point operations for programmable in-memory vector acceleration
Gómez-Luna et al. Benchmarking memory-centric computing systems: Analysis of real processing-in-memory hardware
Li et al. Drisa: A dram-based reconfigurable in-situ accelerator
Ferreira et al. pluto: Enabling massively parallel computation in dram via lookup tables
Olgun et al. QUAC-TRNG: High-throughput true random number generation using quadruple row activation in commodity DRAM chips
Angizi et al. Redram: A reconfigurable processing-in-dram platform for accelerating bulk bit-wise operations
Seshadri et al. Simple operations in memory to reduce data movement
Denzler et al. Casper: Accelerating stencil computations using near-cache processing
Garofalo et al. A heterogeneous in-memory computing cluster for flexible end-to-end inference of real-world deep neural networks
Kim et al. Heterogeneous computing meets near-memory acceleration and high-level synthesis in the post-moore era
Lee et al. Design of processing-“inside”-memory optimized for dram behaviors
Wang et al. ProPRAM: exploiting the transparent logic resources in non-volatile memory for near data computing
Gebregiorgis et al. A survey on memory-centric computer architectures
Yu et al. A monolithic 3D hybrid architecture for energy-efficient computation
Hazarika et al. Survey on memory management techniques in heterogeneous computing systems
Oliveira et al. MIMDRAM: An End-to-End Processing-Using-DRAM System for High-Throughput, Energy-Efficient and Programmer-Transparent Multiple-Instruction Multiple-Data Computing
Hajinazar et al. SIMDRAM: An end-to-end framework for bit-serial SIMD computing in DRAM
Zhou et al. ReD-LUT: Reconfigurable in-DRAM LUTs enabling massive parallel computation
Chen et al. An eight-core RISC-V processor with compute near last level cache in Intel 4 CMOS