[go: up one dir, main page]
More Web Proxy on the site http://driver.im/

Bender et al., 2017 - Google Patents

Two-level main memory co-design: Multi-threaded algorithmic primitives, analysis, and simulation

Bender et al., 2017

View PDF
Document ID
5428722960912638177
Author
Bender M
Berry J
Hammond S
Hemmert K
McCauley S
Moore B
Moseley B
Phillips C
Resnick D
Rodrigues A
Publication year
Publication venue
Journal of Parallel and Distributed Computing

External Links

Snippet

A challenge in computer architecture is that processors often cannot be fed data from DRAM as fast as CPUs can consume it. Therefore, many applications are memory-bandwidth bound. With this motivation and the realization that traditional architectures (with all DRAM …
Continue reading at www.sciencedirect.com (PDF) (other versions)

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRICAL DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for programme control, e.g. control unit
    • G06F9/06Arrangements for programme control, e.g. control unit using stored programme, i.e. using internal store of processing equipment to receive and retain programme
    • G06F9/46Multiprogramming arrangements
    • G06F9/50Allocation of resources, e.g. of the central processing unit [CPU]
    • G06F9/5061Partitioning or combining of resources
    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRICAL DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for programme control, e.g. control unit
    • G06F9/06Arrangements for programme control, e.g. control unit using stored programme, i.e. using internal store of processing equipment to receive and retain programme
    • G06F9/46Multiprogramming arrangements
    • G06F9/50Allocation of resources, e.g. of the central processing unit [CPU]
    • G06F9/5005Allocation of resources, e.g. of the central processing unit [CPU] to service a request
    • G06F9/5011Allocation of resources, e.g. of the central processing unit [CPU] to service a request the resources being hardware resources other than CPUs, Servers and Terminals
    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRICAL DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation
    • G06F12/0223User address space allocation, e.g. contiguous or non contiguous base addressing
    • G06F12/023Free address space management
    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRICAL DIGITAL DATA PROCESSING
    • G06F17/00Digital computing or data processing equipment or methods, specially adapted for specific functions
    • G06F17/30Information retrieval; Database structures therefor; File system structures therefor
    • G06F17/30286Information retrieval; Database structures therefor; File system structures therefor in structured data stores
    • G06F17/30587Details of specialised database models
    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRICAL DIGITAL DATA PROCESSING
    • G06F17/00Digital computing or data processing equipment or methods, specially adapted for specific functions
    • G06F17/50Computer-aided design
    • G06F17/5009Computer-aided design using simulation
    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRICAL DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation
    • G06F12/08Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRICAL DIGITAL DATA PROCESSING
    • G06F8/00Arrangements for software engineering
    • G06F8/40Transformations of program code
    • G06F8/41Compilation
    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRICAL DIGITAL DATA PROCESSING
    • G06F15/00Digital computers in general; Data processing equipment in general
    • G06F15/76Architectures of general purpose stored programme computers
    • G06F15/78Architectures of general purpose stored programme computers comprising a single central processing unit
    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRICAL DIGITAL DATA PROCESSING
    • G06F15/00Digital computers in general; Data processing equipment in general
    • G06F15/16Combinations of two or more digital computers each having at least an arithmetic unit, a programme unit and a register, e.g. for a simultaneous processing of several programmes
    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRICAL DIGITAL DATA PROCESSING
    • G06F1/00Details of data-processing equipment not covered by groups G06F3/00 - G06F13/00, e.g. cooling, packaging or power supply specially adapted for computer application
    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRICAL DIGITAL DATA PROCESSING
    • G06F7/00Methods or arrangements for processing data by operating upon the order or content of the data handled
    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRICAL DIGITAL DATA PROCESSING
    • G06F2217/00Indexing scheme relating to computer aided design [CAD]
    • G06F2217/78Power analysis and optimization
    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRICAL DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRICAL DIGITAL DATA PROCESSING
    • G06F19/00Digital computing or data processing equipment or methods, specially adapted for specific applications
    • G06F19/10Bioinformatics, i.e. methods or systems for genetic or protein-related data processing in computational molecular biology
    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRICAL DIGITAL DATA PROCESSING
    • G06F2212/00Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/25Using a specific main memory architecture

Similar Documents

Publication Publication Date Title
Singh et al. Near-memory computing: Past, present, and future
Ghose et al. Processing-in-memory: A workload-driven perspective
Suchard et al. Understanding GPU programming for statistical computation: Studies in massively parallel massive mixtures
Bender et al. Two-level main memory co-design: Multi-threaded algorithmic primitives, analysis, and simulation
Seshadri et al. Simple operations in memory to reduce data movement
Bergman et al. Exascale computing study: Technology challenges in achieving exascale systems
Han et al. A novel ReRAM-based processing-in-memory architecture for graph traversal
Ghasemi et al. GraphA: An efficient ReRAM-based architecture to accelerate large scale graph processing
Rubin et al. Maps: Optimizing massively parallel applications using device-level memory abstraction
García-Risueño et al. A review of High Performance Computing foundations for scientists
Hazarika et al. Survey on memory management techniques in heterogeneous computing systems
Oliveira et al. MIMDRAM: An End-to-End Processing-Using-DRAM System for High-Throughput, Energy-Efficient and Programmer-Transparent Multiple-Instruction Multiple-Data Computing
Fang et al. Aristotle: A performance impact indicator for the OpenCL kernels using local memory
Wei et al. LICOM3-CUDA: a GPU version of LASG/IAP climate system ocean model version 3 based on CUDA
Aananthakrishnan et al. The Intel programmable and integrated unified memory architecture graph analytics processor
Mittal A survey on evaluating and optimizing performance of Intel Xeon Phi
Gonthier et al. Locality-Aware Scheduling of Independent Tasks for Runtime Systems
Halbiniak et al. Exploration of OpenCL heterogeneous programming for porting solidification modeling to CPU‐GPU platforms
Sliwinski et al. Applying parallel computing techniques to analyze terabyte atmospheric boundary layer model outputs
Haldeman et al. Exploring energy-performance-quality tradeoffs for scientific workflows with in-situ data analyses
Ciznicki et al. Energy aware scheduling model and online heuristics for stencil codes on heterogeneous computing architectures
Davis et al. Paradigmatic shifts for exascale supercomputing
Cicotti et al. Data movement in data-intensive high performance computing
Carracciuolo et al. Toward a new linpack‐like benchmark for heterogeneous computing resources
Jin et al. Population count on intel® cpu, GPU and FPGA