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Geng et al., 2018 - Google Patents

An access-pattern-aware on-chip vector memory system with automatic loading for SIMD architectures

Geng et al., 2018

View PDF
Document ID
5378577303573789617
Author
Geng T
Diken E
Wang T
Jozwiak L
Herbordt M
Publication year
Publication venue
2018 IEEE High Performance extreme Computing Conference (HPEC)

External Links

Snippet

Single-Instruction-Multiple-Data (SIMD) architectures are widely used to accelerate applications involving Data-Level Parallelism (DLP); the on-chip memory system facilitates the communication between Processing Elements (PE) and on-chip vector memory. It is …
Continue reading at www.academia.edu (PDF) (other versions)

Classifications

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    • G06F9/3891—Concurrent instruction execution, e.g. pipeline, look ahead using a plurality of independent parallel functional units controlled by multiple instructions, e.g. MIMD, decoupled access or execute organised in groups of units sharing resources, e.g. clusters
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