Song et al., 2023 - Google Patents
A 35-Gb/s PAM-4 transmitter with 7B4Q full-transition avoidance and area-efficient Gm-boosting techniquesSong et al., 2023
- Document ID
- 5164492132634864551
- Author
- Song E
- Han J
- Seo H
- Kim H
- Im H
- Han J
- Publication year
- Publication venue
- IEEE Transactions on Circuits and Systems II: Express Briefs
External Links
Snippet
This brief describes a channel-loss-tolerant 35-Gb/s PAM-4 transmitter with feed-forward equalization (FFE) for high-speed wireline interfaces. The proposed transmitter adopts 7B4Q full transition avoidance (FTA) coding in combination with the 2-tap FFE to improve the worst …
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L25/00—Baseband systems
- H04L25/02—Details ; Arrangements for supplying electrical power along data transmission lines
- H04L25/03—Shaping networks in transmitter or receiver, e.g. adaptive shaping networks ; Receiver end arrangements for processing baseband signals
- H04L25/03006—Arrangements for removing intersymbol interference
- H04L2025/03433—Arrangements for removing intersymbol interference characterised by equaliser structure
- H04L2025/03439—Fixed structures
- H04L2025/03445—Time domain
- H04L2025/03471—Tapped delay lines
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L25/00—Baseband systems
- H04L25/02—Details ; Arrangements for supplying electrical power along data transmission lines
- H04L25/03—Shaping networks in transmitter or receiver, e.g. adaptive shaping networks ; Receiver end arrangements for processing baseband signals
- H04L25/03006—Arrangements for removing intersymbol interference
- H04L25/03012—Arrangements for removing intersymbol interference operating in the time domain
- H04L25/03019—Arrangements for removing intersymbol interference operating in the time domain adaptive, i.e. capable of adjustment during data reception
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L25/00—Baseband systems
- H04L25/02—Details ; Arrangements for supplying electrical power along data transmission lines
- H04L25/03—Shaping networks in transmitter or receiver, e.g. adaptive shaping networks ; Receiver end arrangements for processing baseband signals
- H04L25/03006—Arrangements for removing intersymbol interference
- H04L25/03343—Arrangements at the transmitter end
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L25/00—Baseband systems
- H04L25/02—Details ; Arrangements for supplying electrical power along data transmission lines
- H04L25/0264—Arrangements for coupling to transmission lines
- H04L25/028—Arrangements specific to the transmitter end
- H04L25/0282—Provision for current-mode coupling
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L25/00—Baseband systems
- H04L25/38—Synchronous or start-stop systems, e.g. for Baudot code
- H04L25/40—Transmitting circuits; Receiving circuits
- H04L25/49—Transmitting circuits; Receiving circuits using code conversion at the transmitter; using predistortion; using insertion of idle bits for obtaining a desired frequency spectrum; using three or more amplitude levels; Baseband coding techniques specific to data transmission systems
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L25/00—Baseband systems
- H04L25/02—Details ; Arrangements for supplying electrical power along data transmission lines
- H04L25/0264—Arrangements for coupling to transmission lines
- H04L25/028—Arrangements specific to the transmitter end
- H04L25/0286—Provision of wave shaping within the driver
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L25/00—Baseband systems
- H04L25/02—Details ; Arrangements for supplying electrical power along data transmission lines
- H04L25/0264—Arrangements for coupling to transmission lines
- H04L25/0266—Arrangements for providing Galvanic isolation, e.g. by means of magnetic or capacitive coupling
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L25/00—Baseband systems
- H04L25/02—Details ; Arrangements for supplying electrical power along data transmission lines
- H04L25/0264—Arrangements for coupling to transmission lines
- H04L25/0278—Arrangements for impedance matching
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L25/00—Baseband systems
- H04L25/02—Details ; Arrangements for supplying electrical power along data transmission lines
- H04L25/03—Shaping networks in transmitter or receiver, e.g. adaptive shaping networks ; Receiver end arrangements for processing baseband signals
- H04L25/03828—Arrangements for spectral shaping; Arrangements for providing signals with specified spectral properties
- H04L25/03834—Arrangements for spectral shaping; Arrangements for providing signals with specified spectral properties using pulse shaping
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L25/00—Baseband systems
- H04L25/02—Details ; Arrangements for supplying electrical power along data transmission lines
- H04L25/08—Modifications for reducing interference; Modifications for reducing effects due to line faults; Receiver end arrangements for detecting or overcoming line faults
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L25/00—Baseband systems
- H04L25/02—Details ; Arrangements for supplying electrical power along data transmission lines
- H04L25/0264—Arrangements for coupling to transmission lines
- H04L25/0292—Arrangements specific to the receiver end
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L25/00—Baseband systems
- H04L25/02—Details ; Arrangements for supplying electrical power along data transmission lines
- H04L25/06—Dc level restoring means; Bias distortion correction decision circuits providing symbol by symbol detection
- H04L25/061—Dc level restoring means; Bias distortion correction decision circuits providing symbol by symbol detection providing hard decisions only; arrangements for tracking or suppressing unwanted low frequency components, e.g. removal of dc offset
-
- H—ELECTRICITY
- H03—BASIC ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/0175—Coupling arrangements; Interface arrangements
- H03K19/0185—Coupling arrangements; Interface arrangements using field effect transistors only
- H03K19/018507—Interface arrangements
- H03K19/018521—Interface arrangements of complementary type, e.g. CMOS
- H03K19/018528—Interface arrangements of complementary type, e.g. CMOS with at least one differential stage
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L7/00—Arrangements for synchronising receiver with transmitter
- H04L7/02—Speed or phase control by the received code signals, the signals containing no special synchronisation information
-
- H—ELECTRICITY
- H03—BASIC ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/0005—Modifications of input or output impedance
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L5/00—Arrangements affording multiple use of the transmission path
- H04L5/14—Two-way operation using the same type of signal, i.e. duplex
Similar Documents
Publication | Publication Date | Title |
---|---|---|
Roshan-Zamir et al. | A 56-Gb/s PAM4 receiver with low-overhead techniques for threshold and edge-based DFE FIR-and IIR-tap adaptation in 65-nm CMOS | |
Farjad-Rad et al. | A 0.4-/spl mu/m CMOS 10-Gb/s 4-PAM pre-emphasis serial link transmitter | |
EP1665689B1 (en) | Dac based line driver with selectable pre-emphasis signal levels | |
Song et al. | A 6-Gbit/s hybrid voltage-mode transmitter with current-mode equalization in 90-nm CMOS | |
Saxena et al. | A 5 Gb/s energy-efficient voltage-mode transmitter using time-based de-emphasis | |
US9853642B1 (en) | Data-dependent current compensation in a voltage-mode driver | |
Park et al. | 23.3 A 3-bit/2UI 27Gb/s PAM-3 single-ended transceiver using one-tap DFE for next-generation memory interface | |
US20080061826A1 (en) | Signal History Controlled Slew-Rate Transmission Method and Bus Interface Transmitter | |
US10171273B2 (en) | Decision feedback equalizer and interconnect circuit | |
Hyun et al. | A 20Gb/s dual-mode PAM4/NRZ single-ended transmitter with RLM compensation | |
Song et al. | A 35-Gb/s PAM-4 transmitter with 7B4Q full-transition avoidance and area-efficient Gm-boosting techniques | |
Celik et al. | A 32 Gb/s PAM-16 TX and ADC-Based RX AFE with 2-tap embedded analog FFE in 28 nm FDSOI | |
Peng et al. | A 56-Gb/s PAM-4 transmitter/receiver chipset with nonlinear FFE for VCSEL-based optical links in 40-nm CMOS | |
Kim et al. | A 60-Gb/s/pin single-ended PAM-4 transmitter with timing skew training and low power data encoding in mimicked 10nm class DRAM process | |
Ahn et al. | An 18-Gb/s NRZ transceiver with a channel-included 2-UI impulse-response filtering FFE and 1-tap DFE compensating up to 32-dB loss | |
Chae et al. | A duo-binary transceiver with time-based receiver and voltage-mode time-interleaved mixing transmitter for DRAM interface | |
Chiu et al. | A 32Gb/s time-based PAM-4 transceiver for high-speed DRAM interfaces with in-situ channel loss and bit-error-rate monitors | |
Cheng et al. | A 32/16 Gb/s 4/2-PAM transmitter with PWM pre-emphasis and 1.2 Vpp per side output swing in 0.13-μm CMOS | |
Park et al. | A single-ended duobinary-PAM4 (PAM7) transmitter with a 2-tap feed-forward equalizer | |
Chong et al. | 112G+ 7-bit DAC-based transmitter in 7-nm FinFET with PAM4/6/8 modulation | |
US10924310B2 (en) | Transmitter with fully re-assignable segments for reconfigurable FFE taps | |
Lee et al. | A low-power DRAM transmitter with phase and current-mode amplitude equalization to improve impedance matching | |
Kim et al. | A 32-Gb/s single-ended PAM-4 transceiver with asymmetric termination and equalization techniques for next-generation memory interfaces | |
Hu et al. | An R2R-DAC-based architecture for equalization-equipped voltage-mode PAM-4 wireline transmitter design | |
Oh et al. | A 100-Gb/s PAM-8 transmitter with 3-tap FFE and high-swing hybrid driver in 40-nm CMOS technology |