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Wu et al., 1998 - Google Patents

Ultrathin nitride/oxide (N/O) gate dielectrics for p/sup+/-polysilicon gated PMOSFETs prepared by a combined remote plasma enhanced CVD/thermal oxidation …

Wu et al., 1998

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Document ID
4680942173963814673
Author
Wu Y
Lucovsky G
Publication year
Publication venue
IEEE Electron Device Letters

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Snippet

Ultrathin nitride-oxide (N/O/spl sim/1.5/2.6 nm) dual layer gate dielectrics have been incorporated into PMOSFETs with boron-implanted polysilicon gates. Boron penetration is effectively suppressed by the top plasma-deposited nitride layer leading to improved short …
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