[go: up one dir, main page]
More Web Proxy on the site http://driver.im/

Teifel et al., 2003 - Google Patents

A high-speed clockless serial link transceiver

Teifel et al., 2003

View PDF
Document ID
4680672233428326150
Author
Teifel J
Manohar R
Publication year
Publication venue
Ninth International Symposium on Asynchronous Circuits and Systems, 2003. Proceedings.

External Links

Snippet

We present a high-speed, clockless, serial link transceiver for inter-chip communication in asynchronous VLSI systems. Serial link transceivers achieve high off-chip data rates by using multiplexing transmitters and demultiplexing receivers that interface parallel on-chip …
Continue reading at csl.yale.edu (PDF) (other versions)

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00Baseband systems
    • H04L25/02Details ; Arrangements for supplying electrical power along data transmission lines
    • H04L25/14Channel dividing arrangements in which a single bit stream is divided between several baseband channels and reassembled at the receiver
    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRICAL DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38Information transfer, e.g. on bus
    • G06F13/42Bus transfer protocol, e.g. handshake; Synchronisation
    • G06F13/4282Bus transfer protocol, e.g. handshake; Synchronisation on a serial bus, e.g. I2C bus, SPI bus
    • G06F13/4291Bus transfer protocol, e.g. handshake; Synchronisation on a serial bus, e.g. I2C bus, SPI bus using a clocked protocol
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04JMULTIPLEX COMMUNICATION
    • H04J3/00Time-division multiplex systems
    • H04J3/02Details
    • H04J3/06Synchronising arrangements
    • H04J3/0635Clock or time synchronisation in a network
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04JMULTIPLEX COMMUNICATION
    • H04J3/00Time-division multiplex systems
    • H04J3/02Details
    • H04J3/04Distributors combined with modulators or demodulators
    • H04J3/047Distributors with transistors or integrated circuits
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00Baseband systems
    • H04L25/38Synchronous or start-stop systems, e.g. for Baudot code
    • H04L25/40Transmitting circuits; Receiving circuits
    • H04L25/49Transmitting circuits; Receiving circuits using code conversion at the transmitter; using predistortion; using insertion of idle bits for obtaining a desired frequency spectrum; using three or more amplitude levels; Baseband coding techniques specific to data transmission systems
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00Arrangements for synchronising receiver with transmitter
    • H04L7/02Speed or phase control by the received code signals, the signals containing no special synchronisation information
    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRICAL DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38Information transfer, e.g. on bus
    • G06F13/40Bus structure
    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRICAL DIGITAL DATA PROCESSING
    • G06F1/00Details of data-processing equipment not covered by groups G06F3/00 - G06F13/00, e.g. cooling, packaging or power supply specially adapted for computer application
    • G06F1/04Generating or distributing clock signals or signals derived directly therefrom
    • G06F1/10Distribution of clock signals, e.g. skew
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00Arrangements for synchronising receiver with transmitter
    • H04L7/0008Synchronisation information channels, e.g. clock distribution lines

Similar Documents

Publication Publication Date Title
CA2366898C (en) Elastic interface apparatus and method therefor
EP0826179B1 (en) Source synchronous clocked data link
EP1624635B1 (en) Device and method for synchronous parallel data transmission using reference signal
US7843216B2 (en) Techniques for optimizing design of a hard intellectual property block for data transmission
Greenstreet Implementing a STARI chip
EP3248290B1 (en) Serializing transmitter
JP5577932B2 (en) Transmission circuit and communication system
Teifel et al. A high-speed clockless serial link transceiver
CN107210761B (en) Serializing transmitter
US20150089108A1 (en) Clock signals for dynamic reconfiguration of communication link bundles
US7512201B2 (en) Multi-channel synchronization architecture
Dobkin et al. Fast asynchronous shift register for bit-serial communication
US20040193931A1 (en) System and method for transferring data from a first clock domain to a second clock domain
US6961691B1 (en) Non-synchronized multiplex data transport across synchronous systems
Berge et al. High-speed serial AER on FPGA
GB2455527A (en) Receiver for data and strobe signals with circuitry to counteract the effects of skew between the signals
US7839963B2 (en) Isochronous synchronizer
US6542999B1 (en) System for latching first and second data on opposite edges of a first clock and outputting both data in response to a second clock
Roine A system for asynchronous high-speed chip to chip communication
Hollis et al. RasP: an area-efficient, on-chip network
JPH0675907A (en) Data transmission system
Elrabaa Robust Two-Phase RZ Asynchronous SoC Interconnects
Saneei et al. A mesochronous technique for communication in network on chips
Abdelfattah 6-GB/S SERIAL LINK TRANSCEIVER FOR NOCS
Hollis et al. An asynchronous interconnect architecture for device security enhancement