Abstract
Nowadays, AES is one of the most widely used encryption algorithms. There are several implementations of AES, both in hardware and software. With the ever-increasing amount of sensitive data that need to be protected, it is natural to turn to parallel AES solutions that exploit the full computational power provided by emerging architectures in order to reduce encryption time. In this paper, we compare the performance of a hardware-based AES solution for multicore CPU (PAES-HW-CPU) with that of two other software-based AES solutions for multicore CPU (PAES-SW-CPU) and GPU (PAES-SW-GPU) respectively. The former is implemented using Intel AES New Instructions and the latter using the OpenSSL library. The results reveal that PAES-HW-CPU achieves higher performance. However, PAES-SW-GPU on 2 GPUs is competitive compared to CPUs with hardware support for AES and few cores and CPUs that do not support AES.
This is a preview of subscription content, log in via an institution to check access.
Access this chapter
Tax calculation will be finalised at checkout
Purchases are for personal use only
Similar content being viewed by others
References
Federal Information Processing Standard Publication 197 (FIPS PUB 197): The Official AES Standard. http://csrc.nist.gov/publications/fips/fips197/fips-197.pdf
Lynn Hathaway: National Policy on the Use of the Advanced Encryption Standard (AES) to Protect National Security Systems and National Security Information (June 2003). http://csrc.nist.gov/groups/ST/toolkit/documents/aes/CNSS15FS.pdf
The OpenSSL Project: Cryptography and SSL/TLS Toolkit. https://www.openssl.org
Intel Corporation. Intel® Advanced Encryption Standard (AES) New Instructions Set. https://www.intel.com/content/dam/doc/white-paper/advanced-encryption-standard-new-instructions-set-paper.pdf
Manavski, S.A., et al.: CUDA compatible GPU as an efficient hardware accelerator for AES cryptography. In: Proceedings of the 2007 IEEE International Conference on Signal Processing and Communications (ICSPC 2007), pp. 65–68 (2007)
Di Biagio, A., et al.: Design of a parallel AES for graphics hardware using the CUDA framework. In: Proceedings of the 2009 IEEE International Symposium on Parallel & Distributed Processing, pp. 1–8 (2009)
Iwai, K., et al.: Acceleration of AES encryption on CUDA GPU. Int. J. Netw. Comput. 2(1), 131–145 (2012)
Pousa, A., et al.: Performance analysis of a symmetric cryptographic algorithm on multicore architectures. In: Computer Science & Technology Series. XVII Argentine Congress of Computer Science Selected Papers, pp. 57–66. EDULP, Argentina (2012)
Ortega, J., et al.: Parallelizing AES on multicores and GPUs. In: Proceedings of the 2011 IEEE International Conference on Electro/Information Technology, pp. 1–5 (2011)
Nishikawa, N., et al.: High-performance symmetric block ciphers on multicore CPU and GPUs. Int. J. Netw. Comput. 2(2), 251–268 (2012)
Pousa, A., et al.: Rendimiento del algoritmo AES sobre arquitecturas de memoria compartida. In: Proceedings of the XXIV Argentine Congress of Computer Science (CACIC), pp. 73–82 (2018)
Kirk, D., et al.: Programming Massively Parallel Processors (Third Edition), pp. 275–304. Morgan Kaufmann, Burlington (2017)
Guao, G. et al.: Different implementations of AES cryptographic algorithm. In: Proceedings of the 2015 IEEE 17th International Conference on High Performance Computing and Communications, 2015 IEEE 7th International Symposium on Cyberspace Safety and Security, and 2015 IEEE 12th International Conference on Embedded Software and Systems, pp. 1848–1853 (2015)
Sanz, V., et al.: Accelerating pattern matching with CPU-GPU collaborative computing. In: Vaidya J., Li J. (eds.) Algorithms and Architectures for Parallel Processing. ICA3PP 2018. Lecture Notes in Computer Science, vol. 11334, pp. 310–322. Springer, Cham (2018). https://doi.org/10.1007/978-3-030-05051-1_22
Author information
Authors and Affiliations
Corresponding author
Editor information
Editors and Affiliations
Rights and permissions
Copyright information
© 2021 Springer Nature Switzerland AG
About this paper
Cite this paper
Sanz, V., Pousa, A., Naiouf, M., De Giusti, A. (2021). Comparison of Hardware and Software Implementations of AES on Shared-Memory Architectures. In: Naiouf, M., Rucci, E., Chichizola, F., De Giusti, L. (eds) Cloud Computing, Big Data & Emerging Topics. JCC-BD&ET 2021. Communications in Computer and Information Science, vol 1444. Springer, Cham. https://doi.org/10.1007/978-3-030-84825-5_5
Download citation
DOI: https://doi.org/10.1007/978-3-030-84825-5_5
Published:
Publisher Name: Springer, Cham
Print ISBN: 978-3-030-84824-8
Online ISBN: 978-3-030-84825-5
eBook Packages: Computer ScienceComputer Science (R0)