Abstract
In recent years, in our digital world, images play an essential part in everyday's communication or in remote sensing, so techniques to validate the integrity and correctness of the transmission are required. The most popular technique is hashing. In this article, we focus on the SHA-3 (Keccak) algorithm for hashing images. We use the images of dimensions 256 × 256 pixel for our implementations based on the VHDL. Our implementations were performed on the Intel Arria 10 GX field-programmable gate array (FPGA) and Nios II processor. Also, experimental results such as entropy, number of pixel changing rate (NPCR), and unified averaged changed intensity (UACI), metrics show that the SHA-3 (Keccak) algorithm is reliable, secure and has a high application potential for hashing images. The proposed design aims to improve the criteria of efficiency, security, and throughput. Finally, we augmented our design using the Floating Point Hardware 2 (FPH2) IP Block and we compared the results of our research with other existing architectures.
This is a preview of subscription content, log in via an institution to check access.
Access this chapter
Tax calculation will be finalised at checkout
Purchases are for personal use only
Similar content being viewed by others
References
Agarwal S (2018) Secure image transmission using fractal and 2D-chaotic map. J Imaging 4(1):17
Swaminathan A, Mao Y, Wu M (2006) Robust and secure image hashing. IEEE Trans Inf Forens Secur 1(2):215–230
Monga V, Banerjee A, Evans BL (2006) A clustering based approach to perceptual image hashing. IEEE Trans Inf Forens Secur 1(1):68–79
Ye G, Huang X (2016) A secure image encryption algorithm based on chaotic maps and SHA-3. Secur Commun Netw 9(13):2015–2023
Ye G, Zhao H, Chai H (2016) Chaotic image encryption algorithm using wave-line permutation and block diffusion. Nonlinear Dyn 83(4):2067–2077
Mestiri H, Kahri F, Bedoui M, Bouallegue B, Machhout M (2016) High throughput pipelined hardware implementation of the KECCAK hash function. In: 2016 international symposium on signal, image, video and communications (ISIVC) IEEE, 2016, pp 282–286
Intel®FPGA (2020) Embedded design handbook [Online]. Available at: https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/hb/nios2/edh_ed_handbook.pdf. Accessed 15 Jan 2021
© Intel Corporation (2018) Nios® II Processors for FPGAs. Intel® FPGA [Online]. Available at: https://www.intel.com/content/www/us/en/products/programmable/processor/nios-ii.html. Accessed 28 Jan 2021
Altera Corporation (2010) Using Nios II floating-point custom instructions [Online]. Available at: http://www.ee.nmt.edu/~erives/554_10/Altera_FloatingPoint.pdf. Accessed 30 Jan 2021
Intel®FPGA (2017) Nios II custom instruction user guide. © Intel Corporation [Online]. Available at: Nios II Custom Instruction User Guide (intel.com). Accessed 22 Jan 2021
NIST, Computer Security Resource Center. National Institute of Standards and Technology [Online]. Available at: https://csrc.nist.gov/projects/cryptographic-standards-and-guidelines. Accessed 5 Feb 2021
Wu Y, Noonan JP, Agaian S (2011) NPCR and UACI randomness tests for image encryption. Cyber J: Multidiscipl J Sci Technol J Sel Areas Telecommun (JSAT) 1(2):31–38
Author information
Authors and Affiliations
Corresponding author
Editor information
Editors and Affiliations
Rights and permissions
Copyright information
© 2022 The Author(s), under exclusive license to Springer Nature Singapore Pte Ltd.
About this paper
Cite this paper
Sideris, A., Sanida, T., Tsiktsiris, D., Dasygenis, M. (2022). Image Hashing Based on SHA-3 Implemented on FPGA. In: Kumar, S., Ramkumar, J., Kyratsis, P. (eds) Recent Advances in Manufacturing Modelling and Optimization. Lecture Notes in Mechanical Engineering. Springer, Singapore. https://doi.org/10.1007/978-981-16-9952-8_44
Download citation
DOI: https://doi.org/10.1007/978-981-16-9952-8_44
Published:
Publisher Name: Springer, Singapore
Print ISBN: 978-981-16-9951-1
Online ISBN: 978-981-16-9952-8
eBook Packages: EngineeringEngineering (R0)