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A High Throughput JPEG2000 Entropy Decoding Unit Architecture

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Abstract

This paper is dedicated to a hardware architecture development for JPEG2000 entropy decoding unit (EDU) which consist of two parts: context modeling unit (CMU) and arithmetic decoding unit (ADU). To achieve a high throughput we propose an efficient pixel skipping scheme to save clock cycles for non-context position in CMU and realize the ADU logic by combinational circuit to keep the result of ADU within the same clock of context which can reduce the latency to zero clock cycle between CMU and ADU. We show that the proposed EDU architecture attains a throughput of 68.66–232.14 Mbps for a single decoding core depending on compression ratios, and consumes 95.79 mW based on SMIC 0.13 um technology. In comparison with the state-of-the-art decoders the proposed EDU architecture provides consistent reconstruction performance with software decoder and comparable throughput, memory and power consumption.

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Acknowledgements

This research work is supported by the National Natural Science Foundation of China under Grant No. 61571345, 91538101, 61850410523 and Huawei Innovation Research Program under Grant No.2017050310. The authors would like to thank the reviewers for their helpful comments and criticism.

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Authors and Affiliations

  1. School of computer science and technology, XIDIAN University, Xi’an, China

    Kai Liu & YunSong Li

  2. Information Systems Department, ITMO University, St. Petersburg, Russia

    Evgeny Belyaev

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  1. Kai Liu
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  2. Evgeny Belyaev
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  3. YunSong Li
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Correspondence to Kai Liu.

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Liu, K., Belyaev, E. & Li, Y. A High Throughput JPEG2000 Entropy Decoding Unit Architecture. J Sign Process Syst 91, 899–913 (2019). https://doi.org/10.1007/s11265-018-1411-6

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  • DOI: https://doi.org/10.1007/s11265-018-1411-6

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