"Affine transforms" examples (such as video stream zooming in/out)? #28
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I have example for scale down. Reference
https://github.com/ztachip/ztachip/raw/master/Documentation/visionai_programmer_guide.pdf
But it would not be hard to do scale up using ztachip programming API
https://github.com/ztachip/ztachip/raw/master/Documentation/ztachip_programmer_guide.pdf
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Subject: [ztachip/ztachip] Video Zoom-In/Out (scaling) example? (Issue #28)
[https://avatars.githubusercontent.com/u/67533663?s=20&v=4]chili-chips-ba created an issue (ztachip/ztachip#28)<#28>
Is there a good example of video scaling with ztachip, ideally for up to 4K @60Hz<https://github.com/60Hz>?!
This is not an issue, but a mere question. Hope it is of interest for the wider community...
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How is the performance within standard Artix-7 target? Can it do 4K, 60FPS, RGB888? If it can, is there horsepower left for the 2nd channel of the same, such as for stereo cameras?! Any demo (YT post) you can share that showcases this transformation? |
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If you just do basic image processing like scaling, the bottleneck is memory bandwidth
At 4K + 60FPS, you need 1.5Gbyte/sec
Current ztachip has 64-bit bus @125mhz so the throughput is 1Gbyte/sec
But you probably can do 4K with Artix7-200 + 32-bit DDR , then you can instantiate 2 times ztachip core to do ***@***.***
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Subject: Re: [ztachip/ztachip] "Affine transforms" examples (such as video stream zooming in/out)? (Issue #28)
[https://avatars.githubusercontent.com/u/67533663?s=20&v=4]chili-chips-ba left a comment (ztachip/ztachip#28)<#28 (comment)>
How is the performance within standard Artix-7 target?
Can it do 4K, 60FPS, RGB888? If it can, is there horsepower left for the 2nd channel of the same, such as for stereo cameras?!
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Are we saying that on-chip RAM is insufficient in size for this task, or also hard to tap into by the ztachip design? |
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I meant DDR memory bandwidth. |
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... yes, it is understood that the off-chip DDR is the bottleneck. It always is 😉. It is also good news that DDR is being expanded to 128 bits. The question however was more about the following:
Here is an interesting excerpt from Xilinx PG231 on this topic. For the "Scaling Only" mode, they don't need much storage, yet alone a large Frame Buffer. That way they can support very high resolutions: |
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Please reference
https://github.com/ztachip/ztachip/blob/master/SW/apps/color/kernels/color.m
Example of perform color conversion, processing is streaming by processing in tiles
Also reference section 6 of doc below on procedure to do stream processing
https://github.com/ztachip/ztachip/raw/master/Documentation/ztachip_programmer_guide.pdf
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Subject: Re: [ztachip/ztachip] "Affine transforms" examples (such as video stream zooming in/out)? (Issue #28)
[https://avatars.githubusercontent.com/u/67533663?s=20&v=4]chili-chips-ba left a comment (ztachip/ztachip#28)<#28 (comment)>
... yes, it is understood that the off-chip DDR is the bottleneck. It always is 😉. It is also good news that DDR is being expanded to 128 bits.
The question however was more about the following:
* If the algorithm does not need a Frame Buffer, how adaptive is the ztachip eco-system, both HW and SW, to such "streaming" processing model?!
Here is an interesting excerpt from Xilinx PG231<https://docs.amd.com/r/en-US/pg231-v-proc-ss/Scaling> on this topic. For the "Scaling Only" mode, they don't need much storage, yet alone a large Frame Buffer. That allows them supporting
image.png (view on web)<https://github.com/user-attachments/assets/573c6599-4623-4175-ae55-e53b36598788>
That allows them supporting very high resolutions<https://docs.amd.com/r/en-US/pg231-v-proc-ss/Feature-Summary>:
image.png (view on web)<https://github.com/user-attachments/assets/e989921e-c56b-4ea7-be83-34ef56965169>
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Is there a good example of video scaling with ztachip, ideally for up to 4K @60Hz?!
This is not an issue, but a mere question. Hope it is of interest for the wider community, since within "Affine transform" topics
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