Hspice Projects This repository contains implementations of four different components using HPICE. DRAM SRAM High-Frequency Divider Manchester Adder DRAM DRAM.sp:Single DRAM cell. DRAM_array.sp:4x4 1T1C DRAM array SRAM 6T-SRAM cell 8T-SRAM cell High-Frequency Divider by D flip-flop Goal:Design a Frequency Divider and measure the highest operating frequency and power consumption. Manchester Adder