8000 Rb info by AjanZhong · Pull Request #3357 · u-root/u-root · GitHub
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Rb info #3357

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Rb info #3357

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Add PCI Root Bridge info in Device Tree to support multiple PCI segments.

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codecov bot commented Apr 20, 2025

Codecov Report

Attention: Patch coverage is 84.40367% with 34 lines in your changes missing coverage. Please review.

Project coverage is 59.28%. Comparing base (ba931e6) to head (756815f).

Additional details and impacted files
@@            Coverage Diff             @@
##             main    #3357      +/-   ##
==========================================
+ Coverage   55.86%   59.28%   +3.42%     
==========================================
  Files         615      618       +3     
  Lines       52480    52689     +209     
==========================================
+ Hits        29319    31239    +1920     
+ Misses      23161    21450    -1711     
Flag Coverage Δ
.-amd64 88.88% <ø> (ø)
cmds/...-amd64 50.81% <ø> (-0.03%) ⬇️
integration/generic-tests/...-amd64 27.79% <0.00%> (?)
integration/generic-tests/...-arm 28.17% <ø> (?)
integration/generic-tests/...-arm64 26.78% <0.00%> (?)
integration/gotests/...-amd64 60.51% <83.48%> (+0.13%) ⬆️
integration/gotests/...-arm 61.21% <83.48%> (+0.04%) ⬆️
integration/gotests/...-arm64 61.36% <83.48%> (+0.14%) ⬆️
pkg/...-amd64 57.98% <83.48%> (+0.14%) ⬆️

Flags with carried forward coverage won't be shown. Click here to find out more.

Components Coverage Δ
everything 64.32% <84.40%> (+3.99%) ⬆️
cmds/exp 31.17% <ø> (+0.38%) ⬆️
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@AjanZhong AjanZhong force-pushed the rbInfo branch 2 times, most recently from c77931b to 583d7b3 Compare April 20, 2025 06:20
AcpiMcfgSignature = "MCFG"
)

const (
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The same initialism for this structure.

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I'm actually don't know how to apply initialism rule to Memory-mapped ConFiGuration..., but PCI should be in upper case.

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I am using MCFG now, we need comments from @rminnich @leongross.
Shall we use "PCIMCFGxxx" or "PCIMcfgxxx", in which "MCFG" or "Mcfg" stands for "Memory mapped Configuration".

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@binjip978 I will address your comments on variables naming later. Thanks for your comments. :)

@AjanZhong AjanZhong force-pushed the rbInfo branch 3 times, most recently from 4370b34 to c45b4f2 Compare April 20, 2025 10:06
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@binjip978 Thanks for your time and comments. I am testing this PR on more hardware configurations to ensure quality. And will switch from "Draft" to "Ready for review" when all test completed.

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I really appreciate the explicitness of your contributions. The documentation provided by comments simplifies reviews a lot.

@AjanZhong AjanZhong force-pushed the rbInfo branch 2 times, most recently from 3c7cb66 to a796c69 Compare April 25, 2025 09:09
@AjanZhong AjanZhong marked this pull request as ready for review April 27, 2025 01:41
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@AjanZhong you marked the PR ready for review. Does that mean you tested the code on hardware as you announced earlier?

< A3E2 /include-fragment>
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@AjanZhong you marked the PR ready for review. Does that mean you tested the code on hardware as you announced earlier?

Yes, we have tested this PR on all platforms w/ and w/o graphic in our environment. I think its ready for review now.

In order to support server with multiple PCI segments, all PCI
Root Bridge information should be provided via Device Tree.

Segments information are retrieved from ACPI MCFG table, and
all Root Bridge information are constructed based on Segments
information, along with MMIO and IO resource regions which are
fetched from 'resource' file of all PCI devices under same
segment.

Signed-off-by: Ajan Zhong <ajan.zhong@newfw.com>
Add test case to covering parse ACPI MCFG table and PCI Root Bridge
information.

Signed-off-by: Ajan Zhong <ajan.zhong@newfw.com>
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