Stars
PCIe Endpoint on Xilinx 7-Series FPGAs with the PCIE_2_1 hard block and GTP transceivers
SDK sch&layout reference design and datasheet documention
Project Peppercorn GateMate Test Cases
Project Peppercorn - GateMate FPGA Bitstream Documentation
Files and documentation for Pico-Dirty-Blaster Workshop
Simple extension boards for Olimex GateMate FPGA Board
A pandoc LaTeX template to convert markdown files to PDF or LaTeX.
Adapter to turn an ESP-Prog into an inexpensive FPGA programmer for use with openFPGALoader.
Modular visual interface for GDB in Python
A minimal-area RISC-V core with a scalable data path to 1, 2, 4, or 8 bits and manifold variants.
An attempt to recreate the RP2040 PIO in an FPGA
A full analog GPS receiver using discrete rf components and TinyFPGA
Repository for the rp2040_pmod board from controlpaths devices.
Unofficial openFPGALoader packages built for WebUSB
Demonstration of the YoWASP toolchain being used with Visual Studio Code to program a Radiona ULX3S board
The ILA allows you to perform in-system debugging of your designs on the GateMate FPGA at runtime. All signals of your design inside the FPGA can be monitored in a waveform.
A RISC-V software platform, exposing Analogue Pocket capabilities in a simple way
Re-coded Gowin GW1N primitives for Verilator use
An FPGA-based USB 1.1 (full-speed) device core to implement USB-serial, USB-camera, USB-audio, USB-hid, etc. It requires only 3 FPGA common IOs rather than additional chips. 基于FPGA的USB 1.1 (full-sp…