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fusesoc

Here are 30 public repositories matching this topic...

midimaster21b / axis-video-frame-cleaner

thesis vhdl fusesoc

Updated Feb 26, 2024
VHDL

find_first_set

sifferman / find_first_set

Find first set operation in Verilog-2001 with logarithmic complexity.

verilog fusesoc find-first-set

Updated Nov 1, 2021
Verilog

sifferman / nes_controller_interface

NES Controller Interface written in Verilog-2005

verilog fusesoc nintendo-nes

Updated Mar 18, 2024
Verilog

josugoar / systemverilog-template

SystemVerilog FuseSoC template

fusesoc

Updated Jul 4, 2024
SystemVerilog

midimaster21b / three-wire-spi-ad

Analog Digital Three Wire SPI

fpga vhdl spi fusesoc

Updated Nov 2, 2022
VHDL

imuguruza / image_displayer

Design for iCE40H4XK for displaying images in a VGA dislay

fpga icestorm yosys ice40 fusesoc

Updated Jun 22, 2020
Verilog

midimaster21b / SHA-Module

A simple SHA-256 implementation in VHDL and Verilog, simulated using a basic UVM testbench.

vhdl verilog systemverilog uvm fusesoc

Updated Oct 23, 2022
Verilog

filmil / bazel_rules_fusesoc_2

Yet another attempt at bazel rules for fusesoc. This one relies on a hermetic installation of fusesoc and edalize, and not a containerized build. See https://github.com/filmil/bazel_rules_fusesoc for that other bit.

eda bazel bazel-rules fusesoc

Updated Jun 28, 2024
Starlark

midimaster21b / amba-interfaces

A few quick interfaces for AMBA standards

systemverilog fusesoc

Updated May 19, 2025
VHDL

sifferman / fusesoc_project_template

A template for starting a Verilog project with FuseSoC integration, Icarus simulation, Verilator linting, Yosys usage report, and VS Code syntax highlighting.

vscode verilog systemverilog icarus-verilog yosys fusesoc verilator

Updated Aug 2, 2023
Makefile

sifferman / tangnano_example

Simple example of how to get started with the Tang Nano with FuseSoC.

fusesoc apicula tangnano

Updated Mar 14, 2022
Makefile

euripedesrocha / tbpp

A simple test library for verilator

cpp verilog fusesoc verilator

Updated May 3, 2020
C++

midimaster21b / axis-bfm

A simple AXIS BFM

axis fusesoc bfm

Updated Nov 18, 2022
SystemVerilog

sifferman / fusesoc_template

Example of how to get started with olofk/fusesoc.

vivado icestorm icarus-verilog yosys fusesoc tinyfpga-bx nexys-a7 nextpnr-ice40

Updated Jul 25, 2021
Python

midimaster21b / axis-video-greyscale

thesis vhdl fusesoc

Updated Feb 26, 2024
VHDL

Illusion-Graphics / RISC-16

16-bit RISC core

core systemverilog fusesoc

Updated Jun 28, 2020
SystemVerilog

midimaster21b / uart-bfm

A simple UART BFM

uart systemverilog fusesoc bfm

Updated Nov 5, 2022
SystemVerilog

ucsbieee / mapache64

Custom 6502 Video Game Console

fpga verilog 65c02 fusesoc cc65 ben-eater-6502 cmod-a7

Updated Feb 3, 2024
SystemVerilog

midimaster21b / spi-bfm

A quick SPI BFM to assist in SPI device testing and development

spi systemverilog fusesoc bfm

Updated Jan 15, 2024
SystemVerilog

midimaster21b / spi-master

A simple SPI master

fpga vhdl spi systemverilog fusesoc

Updated May 25, 2025
VHDL

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