Contains basic Simulation circuit layout for concepts involved in Electronic Devices and Circuits and Integrated Circuits Subjects
2 Week SoC DIgital VLSI Workshop
This repository contains the design, simulation, and analysis of a CMOS Inverter using industry-standard tools like Cadence Virtuoso. The project focuses on understanding and optimizing the fundamental building block of digital circuits—the CMOS inverter.
This repository contains all the experiments which I have done on LTSpice software for the VLSI Design course.
CMOS INVERTER DESIGN AND LAYOUT USING CADENCE VIRTUOSO
Characterised a standard inverter and adding to the openlane flow
This project demonstrates the complete design, layout, simulation, and verification of a **CMOS Inverter** using the **Electric VLSI Design Tool**.
A simple CMOS Inverter implemented on AMD Vivado & Cadence Virtuoso tool
Designed and simulated all fundamental and universal CMOS logic gates (NOT, AND, OR, NAND, NOR, XOR, XNOR) using the Electric VLSI Design Tool. This project includes schematic design, DRC-clean layouts, ALS simulation, and waveform analysis.
This project is a part of the report for my 7th semester program elective (EC-4142 Analog-VLSI).
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