8000 counter-mode · GitHub Topics · GitHub

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counter-mode

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VadanShah / aes-apb-ctr

An AES-128 encryption module in CTR mode with APB interface, implemented in Verilog for FPGA-based secure data communication systems.

crypto aes-encryption verilog-hdl hardware-security counter-mode apb-interface

Updated May 29, 2025
Verilog

AustinPardosi / CryptoNight

https://crypto-night-3sz4.vercel.app/

cryptography permutation confusion substitution diffusion block-cipher cipher-block-chaining counter-mode feistel-network electronic-code-book key-scheduling cipher-feedback output-feedback

Updated Mar 24, 2024
TypeScript

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