Convolutional accelerator kernel, target ASIC & FPGA
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Apr 10, 2023 - Verilog
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accelerator
Here are 16 public repositories matching this topic...
A Flexible and Energy Efficient Accelerator For Sparse Convolution Neural Network
deep-neural-networks accelerator convolutional-neural-networks sparse-matrix gemm noc im2col hardware-accelerator eyeriss-v2
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Feb 22, 2025 - Verilog
[ASAP 2020; FPGA 2020] Hardware architecture to accelerate GNNs (common IP modules for minibatch training and full batch inference)
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Mar 30, 2021 - Verilog
CNN hardware accelerator to accelerate quantized LeNet-5 model
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Sep 26, 2023 - Verilog
FAST-9 Accelerator for Corner Detection
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Jan 1, 2021 - Verilog
NVDLA small config implementation on Zynq ZCU104 (evaluation)
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Mar 25, 2019 - Verilog
Template for project1 TPU
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May 1, 2021 - Verilog
This project is to design yolo AI accelerator in verilog HDL.
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Oct 8, 2024 - Verilog
Initial design attempt for Amiga 500 in socket 68000 Accelerator, FastRAM and IDE Interface
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Feb 20, 2018 - Verilog
RTL-level Convolutional Network Accelerator Implementation on Xilinx Spartan 6. Evaluation for scalability.
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Jan 9, 2020 - Verilog
Verilog implementation of different concepts in Digital Logic Design such as OTHFSM, AFG and Accelerators
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Dec 26, 2023 - Verilog
This is my hobby project, which contain my rsic-v core and my convolutional layer with AMBA bus
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Aug 13, 2024 - Verilog
Projects of the digital logic design lab (Fall01) at the University of Tehran.
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Oct 6, 2023 - Verilog
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