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ARIES: An Agile MLIR-Based Compilation Flow for Reconfigurable Devices with AI Engines (FPGA 2025 Best Paper Nominee)
A curated list of awesome C++ (or C) frameworks, libraries, resources, and shiny things. Inspired by awesome-... stuff.
Xplace 3.0: An Extremely Fast, Extensible and Deterministic Placement Framework with Detailed-Routability and Timing Optimization
🕹 OpenPARF: An Open-Source Placement and Routing Framework for Large-Scale Heterogeneous FPGAs with Deep Learning Toolkit
OpenROAD's unified application implementing an RTL-to-GDS Flow. Documentation at https://openroad.readthedocs.io/en/latest/
OpenROAD's scripts implementing an RTL-to-GDS Flow. Documentation at https://openroad-flow-scripts.readthedocs.io/en/latest/
An Agile RISC-V SoC Design Framework with in-order cores, out-of-order cores, accelerators, and more
All of the JSON data files and card images that the GCV utilizes for Gloomhaven
Implementation of the ePlace algorithm on the AMD Versal architecture, utilizing AIE, PL, and PS regions of the chip.
Repo for code developed during the HEAT project (Homomorphic Encryption Applications Technology)
An MLIR-based toolchain for AMD AI Engine-enabled devices.
Code for the International Symposium of Physical Design (ISPD) 2020 Contest Objective is to provide heuristic solutions for Cerebras' Wafer Scale Engine (WSE)