Stars
Gain an introductory knowledge to the basics of SoC design and key skills required to implement a simple SoC on an FPGA, and write embedded programs targeted at the microprocessor to control the pe…
An HDL design for sending data over Ethernet
SatCat5 is a mixed-media Ethernet switch that lets a variety of devices communicate on the same network.
This repository was developed in the context of the Pervasive AI Developer Contest with AMD
Responsive Angular Material admin application template built on top of Angular, Angular Material and other open-source libraries.
Parallel Programming for FPGAs -- An open-source high-level synthesis book
F Prime Prime Language Support for Visual Studio Code
xupgit / High-Level-Synthesis-Flow-on-Zynq-using-Vivado-HLS
Forked from louisliuwei/High-Level-Synthesis-Flow-on-Zynq-using-Vivado-HLSThis course provides professors with an understanding of high-level synthesis design methodologies necessary to develop digital systems using Vivado HLS. Now under 2018.2 version.
Slides and material for Xilinx bootcamp
Source code from the MicroZed Chronicles blog hosted by Xcell Daily Blog
Collection of Yocto Project layers to enable AMD Xilinx products
Materials for the BRITE-REU programming workshops
E2E test framework for tests with complex environment requirements.
Learn FPGA Programming, published by Packt
A book series (2 published editions) on the JS language.
Principles of Writing Consistent, Idiomatic JavaScript