GitHub - struggling-coder/drcg: FPGA based elementary (7-segment) digit recognition

8000 GitHub - struggling-coder/drcg: FPGA based elementary (7-segment) digit recognition

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struggling-coder/drcg

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clocks.vhd
clocks.vhd

controller.vhd
controller.vhd

fsmgen.py
fsmgen.py

lcd.vhd
lcd.vhd

lcdgen.py
lcdgen.py

ledMat.ino
ledMat.ino

perceptron.vhd
perceptron.vhd

tester.py
tester.py

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FPGA based elementary (7-segment) digit recognition

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VHDL 48.1%

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Name		Name	Last commit message	Last commit date
Latest commit History 28 Commits
clocks.vhd		clocks.vhd
controller.vhd		controller.vhd
fsmgen.py		fsmgen.py
lcd.vhd		lcd.vhd
lcdgen.py		lcdgen.py
ledMat.ino		ledMat.ino
perceptron.vhd		perceptron.vhd
tester.py		tester.py