10000 ramdasjagtap (Ramdas Jagtap) · GitHub
[go: up one dir, main page]
More Web Proxy on the site http://driver.im/
Skip to content
View ramdasjagtap's full-sized avatar
3 followers · 20 following

Achievements

Achievement: Public SponsorAchievement: Pull Shark

Achievements

Achievement: Public SponsorAchievement: Pull Shark

Block or report ramdasjagtap

Block user

Prevent this user from interacting with your repositories and sending you notifications. Learn more about blocking users.

You must be logged in to block users.

Please don't include any personal information such as legal names or email addresses. Maximum 100 characters, markdown supported. This note will be visible to only you.
Report abuse

Contact GitHub support about this user’s behavior. Learn more about reporting abuse.

Report abuse
ramdasjagtap/README.md

Hello There! 👋

I'm Ramdas Jagtap, a passionate developer, tinkerer, and lifelong learner.

🧠 Interests: Digital Design, FPGA, Integrated Circuits, Open Source 📫 Reach me: ramdasjagtap2002@gmail.com

📊 GitHub Stats

Your GitHub Stats

Top Languages

🧰 Toolbox

C C++ Verilog Python SystemVerilog FPGA

Popular repositories Loading

  1. Verilog-assignments Verilog-assignments Public

    Assignments completed during internship

    C 1

  2. CPU CPU Public

    Verilog 1 1

  3. SPI SPI Public

    SPI master implementation and interfacing with winbond slave

    SystemVerilog 1

  4. Coffee Coffee Public

    HTML

  5. calcy calcy Public

    Calculator using html, css, javascript

    JavaScript

  6. ALU ALU Public

    Verilog

0