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Primary Git Repository for the Zephyr Project. Zephyr is a new generation, scalable, optimized, secure RTOS for multiple hardware architectures.
The CORE-V CVA6 is an Application class 6-stage RISC-V CPU capable of booting Linux
lowRISC / ariane
Forked from openhwgroup/cva6Ariane is a 6-stage RISC-V CPU
i4kimura / ariane
Forked from openhwgroup/cva6Ariane is a 6-stage RISC-V CPU capable of booting Linux
Curated list of project-based tutorials
A 16-bit RISC CPU inspired by MIPS. I designed this to learn more about computer architecture/organization.
Example code for HTML, CSS, and Javascript for Web Developers Coursera Course
Rewrite of ModMyFactory, the Factorio mod manager
This project aims to enhance the working environment on Windows
Sorting Google Scholar search results based on the numb 964C er of citations
A very simple and easy to understand RISC-V core.
Accompanying live info and links for VLSI Design Systems and Redwood EDA "Microprocessor for You in Thirty Hours" Workshop
A fully compliant RISC-V computer made inside the game Terraria
A handy quick tool for blocking mechanical keyboard chatter.
Ascon - Lightweight Authenticated Encryption & Hashing
Free for academic use. Consultation required for commercial use.
Free for academic use. Consultation required for commercial use.
Free for academic use. Consultation required for commercial use.
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