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Ethernet interface modules for Cocotb

Python 66 21 Updated Nov 7, 2023

AXI interface modules for Cocotb

Python 267 83 Updated Nov 16, 2023

Verilog PCI express components

Verilog 1,345 345 Updated Apr 26, 2024

Open source FPGA-based NIC and platform for in-network compute

Verilog 64 14 Updated Nov 3, 2024

Verilog AXI stream components for FPGA implementation

Python 809 248 Updated Feb 27, 2025

Verilog Ethernet components for FPGA implementation

Verilog 2,599 764 Updated Feb 27, 2025

Fully parametrizable combinatorial parallel LFSR/CRC module

Python 149 58 Updated Feb 27, 2025

Verilog I2C interface for FPGA implementation

Verilog 625 182 Updated Feb 27, 2025

Verilog AXI components for FPGA implementation

Verilog 1,742 487 Updated Feb 27, 2025

PCI express simulation framework for Cocotb

Python 165 53 Updated Apr 30, 2025

AXI, AXI stream, Ethernet, and PCIe components in System Verilog

SystemVerilog 7 1 Updated Jun 15, 2025

Entropy source based on jitter between multiple, digital ring oscillators.

Verilog 7 3 Updated Oct 8, 2020
Verilog 14 Updated Apr 18, 2023

Opensource DDR3 Controller

Verilog 343 47 Updated Jun 14, 2025

FEC Codec IP core library for a some famous codes (BCH, RS, LDPC, Turbo)

SystemVerilog 105 36 Updated Jun 22, 2024

Open source FPGA-based NIC and platform for in-network compute

Verilog 195 47 Updated May 4, 2024

Bus bridges and other odds and ends

Verilog 567 112 Updated Apr 14, 2025

Open FPGA Modules

VHDL 23 10 Updated Oct 8, 2024

A DPDK repo with Corundum driver

C 28 16 Updated Aug 1, 2022

Ethernet switch implementation written in Verilog

Python 49 14 Updated Jun 13, 2023

Common SystemVerilog components

SystemVerilog 627 171 Updated Jun 16, 2025

An open source multi-function instrument for everyone

Python 1,236 440 Updated Nov 5, 2024

Framework for FPGA-accelerated Middlebox Development

Verilog 44 13 Updated Feb 18, 2023

Universal utility for programming FPGA

C++ 1,356 292 Updated Jun 13, 2025

AD9361 based USB3 SDR

VHDL 114 31 Updated Oct 3, 2017
Verilog 27 12 Updated Jun 12, 2022

I2C Master and Slave

Verilog 35 12 Updated Jul 15, 2015

Send video/audio over HDMI on an FPGA

SystemVerilog 1,172 127 Updated Feb 3, 2024

AXI4 and AXI4-Lite interface definitions

SystemVerilog 94 26 Updated Sep 20, 2020

Python library for maniputing BPF programs.

Python 4 1 Updated Aug 25, 2016
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