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ShanghaiTech University
- Pudong, Shanghai
Stars
Prefix tree adder space exploration library
Open-source high-performance RISC-V processor
An MLIR-based toolchain for AMD AI Engine-enabled devices.
A curated list of awesome LLVM (including Clang, etc) related resources.
A code generator for array-based code on CPUs and GPUs
Theano was a Python library that allows you to define, optimize, and evaluate mathematical expressions involving multi-dimensional arrays efficiently. It is being continued as PyTensor: www.github.…
ABC: System for Sequential Logic Synthesis and Formal Verification
ROS overlay for the Nix package manager
Fast, Accurate and Convenient Light-Weight HLS Framework for Academic Design Space Exploration and Evaluation. (LLVM-11)
Bridging polyhedral analysis tools to the MLIR framework
[FPGA 2021, Best Paper Award] An automated floorplanning and pipelining tool for Vivado HLS.
HeteroCL: A Multi-Paradigm Programming Infrastructure for Software-Defined Heterogeneous Computing
A collection of extensions for Vitis and Intel FPGA OpenCL to improve developer quality of life.
scratchip is a framework that can help to build your Chisel and Verilog/Systemverilog project easier.
A template project for beginning new Chisel work