8000 [UR][L0] Add support for querying the Vector Width Size Properties by nrspruit · Pull Request #19159 · intel/llvm · GitHub
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[UR][L0] Add support for querying the Vector Width Size Properties #19159

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Merged
merged 1 commit into from
Jun 26, 2025

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nrspruit
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  • Adds support for the L0 extension ZE_extension_device_vector_sizes
  • Enables for querying one or more supported vector width preferrred and native vector widths for each supported data type.
  • By default, the max vector widths per datatype are reported based on the max values.
  • UR_L0_VECTOR_WIDTH_SIZE = <vector_width_size> is a hint to return the perferred and native sizes for a specific vector width. If it is not supported, then the defaults are returned.
  • If this extension is not supported, then the previous defaults are returned.

@nrspruit nrspruit requested review from a team as code owners June 25, 2025 22:28
@nrspruit nrspruit force-pushed the vector_width_size_query branch from 767c81b to f12318a Compare June 25, 2025 23:19
- Adds support for the L0 extension ZE_extension_device_vector_sizes
- Enables for querying one or more supported vector width preferrred and
  native vector widths for each supported data type.
- By default, the max vector widths per datatype are reported based on
  the max values.
- UR_L0_VECTOR_WIDTH_SIZE = <vector_width_size> is a hint to return the
  perferred and native sizes for a specific vector width. If it is not
supported, then the defaults are returned.
- If this extension is not supported, then the previous defaults are
  returned.

Signed-off-by: Neil R. Spruit <neil.r.spruit@intel.com>
@nrspruit
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@intel/llvm-gatekeepers , please merge when able, thank you for your time!

@sarnex sarnex merged commit a5bf268 into intel:sycl Jun 26, 2025
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