8000 [UR][Graph] Strengthen in-order command-buffer property by EwanC · Pull Request #18444 · intel/llvm · GitHub
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[UR][Graph] Strengthen in-order command-buffer property #18444

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Merged
merged 1 commit into from
May 15, 2025

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EwanC
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@EwanC EwanC commented May 13, 2025

Closes issue #18330 to enhance the semantics of the UR command-buffer in-order property such that sync-point dependencies will always be ignored.

Also fixes up an artifact in the UR command-buffer spec where it says that descriptors to the command-buffer creation API can be optional, when after #17058 they are mandatory.

@EwanC EwanC force-pushed the ewan/ur_enforce_in-order branch from 26f0318 to 7047439 Compare May 13, 2025 14:20
@EwanC EwanC force-pushed the ewan/ur_enforce_in-order branch from 7047439 to 31b457f Compare May 13, 2025 15:06
@EwanC EwanC temporarily deployed to WindowsCILock May 13, 2025 15:07 — with GitHub Actions Inactive
@EwanC EwanC temporarily deployed to WindowsCILock May 13, 2025 15:50 — with GitHub Actions Inactive
@EwanC EwanC temporarily deployed to WindowsCILock May 13, 2025 15:50 — with GitHub Actions Inactive
@EwanC EwanC force-pushed the ewan/ur_enforce_in-order branch 2 times, most recently from 51a9df2 to 84a11de Compare May 14, 2025 10:19
@EwanC EwanC force-pushed the ewan/ur_enforce_in-order branch from 84a11de to b2c1963 Compare May 14, 2025 10:43
@EwanC EwanC temporarily deployed to WindowsCILock May 14, 2025 10:43 — with GitHub Actions Inactive
@EwanC EwanC temporarily deployed to WindowsCILock May 14, 2025 11:35 — with GitHub Actions Inactive
@EwanC EwanC temporarily deployed to WindowsCILock May 14, 2025 11:35 — with GitHub Actions Inactive
Actions issue intel#18330 to
enhance the semantics of the UR command-buffer in-order property
such that sync-point dependencies will always be ignored.
@EwanC EwanC force-pushed the ewan/ur_enforce_in-order branch from b2c1963 to 5209cae Compare May 14, 2025 11:55
@EwanC EwanC temporarily deployed to WindowsCILock May 14, 2025 11:55 — with GitHub Actions Inactive
@EwanC EwanC temporarily deployed to WindowsCILock May 14, 2025 12:15 — with GitHub Actions Inactive
@EwanC EwanC temporarily deployed to WindowsCILock May 14, 2025 12:15 — with GitHub Actions Inactive
@EwanC EwanC marked this pull request as ready for review May 15, 2025 04:27
@EwanC EwanC requested review from a team as code owners May 15, 2025 04:27
@EwanC EwanC requested a review from Bensuo May 15, 2025 04:27
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EwanC commented May 15, 2025

@intel/llvm-gatekeepers This is good to merge, thanks
The Arc CI fails are a known issue in #18463

@sommerlukas sommerlukas merged commit 320516b into intel:sycl May 15, 2025
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sommerlukas pushed a commit that referenced this pull request May 21, 2025
CTS test `urInOrderUSMCommandBufferExpTest.WithHints` has been reported
as failing on unrelated PRs on PVC in GitHub CI
#18544 which were added recently in
#18444

Disable the UR CTS in-order tests on Level-Zero V1 adapter until this
bug is investigated and resolved. I've disabled more than the specific
test that fails, as the others UR tests inheriting from the base fixture
are variants, and it is not unlikely that we'd end up seeing flaky fails
in CI for them too.
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