Official repository of all Avnet Board Defintion Files which can be used with Xilinx Vivado Design Suite.
Disclaimer:
Avnet, Inc. makes no warranty for the use of these design files. The files are provided "As Is". Avnet, Inc assumes no responsibility for any errors, which may appear in these files, nor does it make a commitment to update the information contained herein. Avnet, Inc specifically disclaims any implied warranties of fitness for a particular purpose.
- Xilinx Vivado Design Suite: Vivado 2017.4
This repository is intended to provide publicly accessible, revision control for all current Avnet Board Definition Files.
Please copy the desired Board Definition Files from this repository to the following folder of the Vivado 2017.4 install directory:
<install_location>\Vivado\2017.4\data\boards\board_files
Once the files are copied to the appropriate Vivado install sub-folder, launch Vivado Design Suite 2017.4 to be able to access the Avnet boards through the new project creation wizard or use one of the scripted project builds from the Avnet hdl repository.
For design support please contact your local Avnet FAE or visit one of our support forums:
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For design-in product support for MicroZed, PicoZed, and UltraZed modules please access the community support forums at Zed Community Support Forums.
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Please access the Avnet Technical Community forums for all other board support inquiries.
I am an engineer, I found a bug and I want to contribute the fix back into this repo, how can I submit changes?
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First of all, thank you for contributing!
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Please contact the support forum for the Avnet board you are using.
- Please contact the Avnet Design Group for further details.