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This is the third module of the Hardware Lab Course to build a single cycle processor at NIT Calicut Topics Resources

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Single Cycle Processor

This repository contains one code for the Single Cycle Processor, subsequent testbenches to test each instruction individually and a few questions on the topic.

Single Cycle Code:

Main Code

Testbenches for Instructions:

The best way to check if the single cycle code correctly implements an instruction is to update the instruction memory (ie. machine code) to use that particular operation before storing the result at a particular location in the data memory. Then, we use the testbench to cross-check the value stored at that address with the expected result of the instruction. If they match, the instruction has executed properly and the program will print 'Simulation succeeded'.

  1. Add: tb_add.v
  2. Subtract: tb_sub.v
  3. Branch if Equal: tb_beq.v
  4. Load Word: tb_lw.v
  5. Store Word: tb_sw.v

Modification Questions:

  1. Modify the given Single Cycle Processor code to include the Andi, Ori and Xori instructions.

  2. Modify the given Single Cycle Processor code to include the Jr (Jump Register) instruction.

Sample Assignment Questions:

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