10000 Trace segmentation by grandchildrice · Pull Request #14 · grandchildrice/jolt · GitHub
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Trace segmentation #14

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fdbe2a1
serialize
adust09 Dec 2, 2024
7522726
rename vec
adust09 Dec 2, 2024
96e2a4e
add serialized_memory_polynomials
adust09 Dec 2, 2024
e02f8b9
todo
ClankPan Dec 3, 2024
a2f6e4d
copy memory
adust09 Dec 3, 2024
43c205d
wip: new methods to segmentate a trace and to get snapshots
ClankPan Dec 3, 2024
c29558e
add comment
adust09 Dec 3, 2024
1c8e92a
wip: testing to prove first segmentation
ClankPan Dec 3, 2024
1806e3d
wip: Only prove output consistency if the segment is the final one
ClankPan Dec 3, 2024
e7480fc
Merge pull request #3 from grandchildrice/extract_gkr_struct
adust09 Dec 3, 2024
c44bf0b
Merge pull request #5 from grandchildrice/fix_prove_fn
adust09 Dec 3, 2024
ffc78e9
wip: prove first segment
ClankPan Dec 3, 2024
d5b5931
Merge branch 'snapshot_memory_state' into save_memory_and_register_state
ClankPan Dec 3, 2024
f602479
remove register_init arguments
ClankPan Dec 3, 2024
e20513e
Merge pull request #6 from grandchildrice/save_memory_and_register_state
ClankPan Dec 3, 2024
fc42e45
wip
ClankPan Dec 3, 2024
e107ecb
wip: todo, need to fix error in jolt-core/src/poly/dense_mlpoly.rs
ClankPan Dec 3, 2024
a1a7f97
refactor
adust09 Dec 3, 2024
44dd5a4
fix constraint size
adust09 Dec 3, 2024
97bf36c
add debug prints
ClankPan Dec 4, 2024
f9036fe
fix trace length error
ClankPan Dec 4, 2024
7a96dda
Merge pull request #7 from grandchildrice/Dec_4th_fix_error
ClankPan Dec 4, 2024
9dd4254
Merge pull request #8 from grandchildrice/save_memory_and_register_state
ClankPan Dec 4, 2024
24a420a
Merge branch 'trace_segmentation' into snapshot_memory_state
ClankPan Dec 4, 2024
ba015c0
Merge pull request #9 from grandchildrice/snapshot_memory_state
ClankPan Dec 4, 2024
137c66d
init logger at once
ClankPan Dec 4, 2024
d22c7dd
wip
ClankPan Dec 4, 2024
aa4d49d
convert resiter_init
adust09 Dec 4, 2024
ebbd07d
wip
ClankPan Dec 4, 2024
87372bc
type annotation
ClankPan Dec 4, 2024
0d35327
Merge pull request #12 from grandchildrice/refactor
ClankPan Dec 4, 2024
123f654
Merge pull request #13 from grandchildrice/conver_register_init_type
adust09 Dec 4, 2024
a99842f
refactor typo
adust09 Dec 4, 2024
b059245
Merge remote-tracking branch 'refs/remotes/origin/trace_segmentation'…
adust09 Dec 4, 2024
7fa2bda
fix type
adust09 Dec 4, 2024
b005100
fix cut_trace todo
adust09 Dec 7, 2024
7a2f015
add poly json into .gitignore
adust09 Dec 8, 2024
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6 changes: 5 additions & 1 deletion .gitignore
Original file line number Diff line number Diff line change
Expand Up @@ -21,4 +21,8 @@ temp_file

# ide
.idea
.vscode
.vscode

tmp_register_init.bin
/jolt-core/instruction_polynomials.json
/jolt-core/memory_polynomials.json
31 changes: 31 additions & 0 deletions Cargo.lock

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2 changes: 2 additions & 0 deletions common/src/constants.rs
Original file line number Diff line number Diff line change
Expand Up @@ -22,3 +22,5 @@ pub const fn virtual_register_index(index: u64) -> u64 {
// peripheral devices || inputs || outputs || panic || termination || padding || RAM
// Notably, we want to be able to map the VM memory address space to witness indices
// using a constant shift, namely (RAM_WITNESS_OFFSET + RAM_START_ADDRESS)

pub const TRACE_SEGMENTATION_SIZE: u64 = 100; // this size is the number of instructions in a segment
2 changes: 1 addition & 1 deletion common/src/lib.rs
Original file line number Diff line number Diff line change
@@ -1,4 +1,4 @@
pub mod attributes;
pub mod constants;
pub mod rv_trace;
pub mod serializable;
pub mod serializable;
8 changes: 7 additions & 1 deletion jolt-core/Cargo.toml
Original file line number Diff line number Diff line change
Expand Up @@ -41,7 +41,7 @@ rand = "0.7.3"
rand_chacha = { version = "0.3.0", default-features = false }
rand_core = { version = "0.6.4", default-features = false }
rayon = { version = "^1.8.0", optional = true }
serde = { version = "1.0.*", default-features = false }
serde = { version = "1.0.*", default-features = false, features = ["derive"] }
sha3 = "0.10.8"
strum = "0.26.3"
strum_macros = "0.26.4"
Expand All @@ -67,6 +67,9 @@ tokio = { version = "1.38.0", optional = true }
alloy-primitives = "0.7.6"
alloy-sol-types = "0.7.6"

log = "0.4"
env_logger = "0.10"

[dev-dependencies]
criterion = { version = "0.5.1", features = ["html_reports"] }
iai-callgrind = "0.10.2"
Expand Down Expand Up @@ -109,6 +112,9 @@ default = [
]
host = ["dep:reqwest", "dep:tokio"]

para = ["tracer/trace-segmentation"]
ignore-all-io = []

[target.'cfg(not(target_arch = "wasm32"))'.dependencies]
memory-stats = "1.0.0"
tokio = { version = "1.38.0", optional = true, features = ["rt-multi-thread"] }
Expand Down
63 changes: 63 additions & 0 deletions jolt-core/src/host/mod.rs
Original file line number Diff line number Diff line change
Expand Up @@ -8,13 +8,15 @@ use std::{
process::Command,
};

use log::debug;
use postcard;
use rayon::prelude::*;
use serde::Serialize;

use common::{
constants::{
DEFAULT_MAX_INPUT_SIZE, DEFAULT_MAX_OUTPUT_SIZE, DEFAULT_MEMORY_SIZE, DEFAULT_STACK_SIZE,
TRACE_SEGMENTATION_SIZE,
},
rv_trace::JoltDevice,
};
Expand Down Expand Up @@ -225,6 +227,67 @@ impl Program {
(io_device, trace)
}

// TODO(moodlezoup): Make this generic over InstructionSet
#[tracing::instrument(skip_all, name = "Program::trace")]
pub fn segment_trace(
&mut self,
) -> (
JoltDevice,
Vec<([i64; 32], Vec<u64>, u64)>,
Vec<Vec<JoltTraceStep<RV32I>>>,
) {
self.build();
let elf = self.elf.clone().unwrap();
let (raw_trace, io_device, snapshots) =
tracer::segment_trace(&elf, &self.input, self.max_input_size, self.max_output_size);

let traces = raw_trace
.chunks(TRACE_SEGMENTATION_SIZE as usize)
.map(|segmented_raw_trace| {
let segmented_raw_trace = segmented_raw_trace.to_vec();
debug!("segmented_raw_trace len: {}", segmented_raw_trace.len());
let trace: Vec<_> = segmented_raw_trace
.into_par_iter()
.flat_map(|row| match row.instruction.opcode {
tracer::RV32IM::MULH => MULHInstruction::<32>::virtual_trace(row),
tracer::RV32IM::MULHSU => MULHSUInstruction::<32>::virtual_trace(row),
tracer::RV32IM::DIV => DIVInstruction::<32>::virtual_trace(row),
tracer::RV32IM::DIVU => DIVUInstruction::<32>::virtual_trace(row),
tracer::RV32IM::REM => REMInstruction::<32>::virtual_trace(row),
tracer::RV32IM::REMU => REMUInstruction::<32>::virtual_trace(row),
tracer::RV32IM::SH => SHInstruction::<32>::virtual_trace(row),
tracer::RV32IM::SB => SBInstruction::<32>::virtual_trace(row),
tracer::RV32IM::LBU => LBUInstruction::<32>::virtual_trace(row),
tracer::RV32IM::LHU => LHUInstruction::<32>::virtual_trace(row),
tracer::RV32IM::LB => LBInstruction::<32>::virtual_trace(row),
tracer::RV32IM::LH => LHInstruction::<32>::virtual_trace(row),
_ => vec![row],
})
.map(|row| {
let instruction_lookup = if let Ok(jolt_instruction) = RV32I::try_from(&row)
{
Some(jolt_instruction)
} else {
// Instruction does not use lookups
None
};

JoltTraceStep {
instruction_lookup,
bytecode_row: BytecodeRow::from_instruction::<RV32I>(&row.instruction),
memory_ops: (&row).into(),
circuit_flags: row.instruction.to_circuit_flags(),
}
})
.collect();
debug!("trace with virtual sequence: {}", trace.len());
trace
})
.collect();

(io_device, snapshots, traces)
}

pub fn trace_analyze<F: JoltField>(mut self) -> ProgramSummary {
self.build();
let elf = self.elf.as_ref().unwrap();
Expand Down
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